On Mon, Jan 23, 2017 at 12:16 PM, Marek Vasut marex@denx.de wrote:
On 01/10/2017 06:20 AM, Chee Tien Fong wrote:
From: Tien Fong Chee tien.fong.chee@intel.com
The drivers is restructured such common functions, gen5 functions. and arria10 functions are moved to misc.c, misc_gen5 and misc_arria10 respectively.
Signed-off-by: Tien Fong Chee tien.fong.chee@intel.com Cc: Marek Vasut marex@denx.de Cc: Dinh Nguyen dinguyen@kernel.org Cc: Ching Liang See chin.liang.see@intel.com Cc: Tien Fong skywindctf@gmail.com
arch/arm/mach-socfpga/Makefile | 6 +- arch/arm/mach-socfpga/include/mach/misc.h | 32 ++ arch/arm/mach-socfpga/misc.c | 427 +------------------------- arch/arm/mach-socfpga/misc_arria10.c | 255 +++++++++++++++ arch/arm/mach-socfpga/{misc.c => misc_gen5.c} | 232 ++------------ 5 files changed, 337 insertions(+), 615 deletions(-) create mode 100644 arch/arm/mach-socfpga/include/mach/misc.h create mode 100644 arch/arm/mach-socfpga/misc_arria10.c copy arch/arm/mach-socfpga/{misc.c => misc_gen5.c} (66%)
diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-socfpga/Makefile index b8fcf6e..1ab68be 100644 --- a/arch/arm/mach-socfpga/Makefile +++ b/arch/arm/mach-socfpga/Makefile @@ -9,9 +9,11 @@
obj-y += misc.o timer.o reset_manager.o system_manager.o clock_manager.o \ fpga_manager.o board.o -obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += reset_manager_arria10.o +obj-$(CONFIG_TARGET_SOCFPGA_ARRIA10) += reset_manager_arria10.o misc_arria10.o \
clock_manager_arria10.o pinmux.oobj-$(CONFIG_TARGET_SOCFPGA_GEN5) += scan_manager.o wrap_pll_config.o \
reset_manager_gen5.o
reset_manager_gen5.o misc_gen5.o \clock_manager_gen5.oifdef CONFIG_SPL_BUILD obj-y += spl.o diff --git a/arch/arm/mach-socfpga/include/mach/misc.h b/arch/arm/mach-socfpga/include/mach/misc.h new file mode 100644 index 0000000..045268d --- /dev/null +++ b/arch/arm/mach-socfpga/include/mach/misc.h @@ -0,0 +1,32 @@ +/*
- Copyright (C) 2016, Intel Corporation
- SPDX-License-Identifier: GPL-2.0
- */
+#ifndef _MISC_H_ +#define _MISC_H_
Use tabs and spaces consistently.
okay.
+extern void dwmac_deassert_reset(const unsigned int of_reset_id,
const u32 phymode);+struct bsel{
const char *mode;const char *name;+};
+extern struct bsel bsel_str[];
+#ifdef CONFIG_FPGA +extern void socfpga_fpga_add(void);
This MUST be declared in some header file, so there should be no need for any such crap like extern in C file.
Yes, you are right.
+#else +inline void socfpga_fpga_add(void) {}
This should be fixed in some fpga.h or whereever this function comes from.
This function is in misc.c now.
+#endif
This patch probably needs to be dispersed into the other A10 misc patches.
Yes, will restructure this.
+#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) +unsigned int dedicated_uart_com_port(const void *blob); +unsigned int shared_uart_com_port(const void *blob); +unsigned int uart_com_port(const void *blob); +#endif
+#endif /* _MISC_H_ */