
7 Apr
2016
7 Apr
'16
7:01 p.m.
From: Moritz Fischer moritz.fischer@ettus.com
Added addtional bindings required for FPGA Manager operation of the Xilinx Zynq Devc configuration interface.
Signed-off-by: Moritz Fischer moritz.fischer@ettus.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynq-7000.dtsi | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/zynq-7000.dtsi b/arch/arm/dts/zynq-7000.dtsi index 55eae614630a..aff65f2decb3 100644 --- a/arch/arm/dts/zynq-7000.dtsi +++ b/arch/arm/dts/zynq-7000.dtsi @@ -307,6 +307,7 @@ devcfg: devcfg@f8007000 { compatible = "xlnx,zynq-devcfg-1.0"; reg = <0xf8007000 0x100>; + syscon = <&slcr>; };
global_timer: timer@f8f00200 {
--
1.9.1