Am 23.04.2017 um 10:43 schrieb Álvaro Fernández Rojas:
CFE checks CPU Thread in a different way (using register $22): mfc0 t1, C0_BCM_CONFIG, 3 # $22 li t2, CP0_CMT_TPID # (1 << 31) and t1, t2 bnez t1, 2f # if we are running on thread 1, skip init nop
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com
v4: No changes. v5: No changes. v3: Select CONFIG_REMAKE_ELF. v2: Introduce changes suggested by Daniel Schwierzeck:
- Split BMIPS support patches.
- Replace initdram with dram_init.
- Merge with "fix first CPU check" patch.
arch/mips/Kconfig | 10 ++++++++++ arch/mips/Makefile | 1 + arch/mips/cpu/start.S | 5 +++++ arch/mips/mach-bmips/Kconfig | 22 ++++++++++++++++++++++ arch/mips/mach-bmips/Makefile | 5 +++++ arch/mips/mach-bmips/dram.c | 37 +++++++++++++++++++++++++++++++++++++ include/configs/bmips_common.h | 27 +++++++++++++++++++++++++++ 7 files changed, 107 insertions(+) create mode 100644 arch/mips/mach-bmips/Kconfig create mode 100644 arch/mips/mach-bmips/Makefile create mode 100644 arch/mips/mach-bmips/dram.c create mode 100644 include/configs/bmips_common.h
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index d97930e..c97ea41 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -75,6 +75,15 @@ config ARCH_ATH79 select OF_CONTROL select DM
+config ARCH_BMIPS
- bool "Support BMIPS SoCs"
- select OF_CONTROL
- select DM
- select CLK
- select CPU
- select RAM
- select SYSRESET
config MACH_PIC32 bool "Support Microchip PIC32" select OF_CONTROL @@ -123,6 +132,7 @@ source "board/micronas/vct/Kconfig" source "board/pb1x00/Kconfig" source "board/qemu-mips/Kconfig" source "arch/mips/mach-ath79/Kconfig" +source "arch/mips/mach-bmips/Kconfig" source "arch/mips/mach-pic32/Kconfig"
if MIPS diff --git a/arch/mips/Makefile b/arch/mips/Makefile index efe7e44..c30d4ef 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -15,6 +15,7 @@ libs-y += arch/mips/lib/
machine-$(CONFIG_SOC_AU1X00) += au1x00 machine-$(CONFIG_ARCH_ATH79) += ath79 +machine-$(CONFIG_ARCH_BMIPS) += bmips machine-$(CONFIG_MACH_PIC32) += pic32
machdirs := $(patsubst %,arch/mips/mach-%/,$(machine-y)) diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index f7dee81..5c1ad00 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -151,8 +151,13 @@ reset: mfc0 t0, CP0_GLOBALNUMBER #endif
+#ifdef CONFIG_ARCH_BMIPS +1: mfc0 t0, CP0_DIAGNOSTIC, 3
- and t0, t0, (1 << 31)
+#else 1: mfc0 t0, CP0_EBASE and t0, t0, EBASE_CPUNUM +#endif
/* Hang if this isn't the first CPU in the system */ 2: beqz t0, 4f diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig new file mode 100644 index 0000000..42a7e41 --- /dev/null +++ b/arch/mips/mach-bmips/Kconfig @@ -0,0 +1,22 @@ +menu "Broadcom MIPS platforms"
- depends on ARCH_BMIPS
+config SYS_SOC
- default "none"
+choice
- prompt "Boot mode"
+config BMIPS_BOOT_RAM
- bool "RAM boot"
- depends on BMIPS_SUPPORTS_BOOT_RAM
- help
This builds an image that is linked to a RAM address. Caches aredisabled and environment is built in.
maybe you should rename the Kconfig symbol and rephrase the help text. You want to have a stage2 loader in ELF format. For this, caches shouldn't be disabled or touched at all. Also it's up to the user if he wants a persistent environment in flash.
+endchoice
+config BMIPS_SUPPORTS_BOOT_RAM
- bool
+endmenu diff --git a/arch/mips/mach-bmips/Makefile b/arch/mips/mach-bmips/Makefile new file mode 100644 index 0000000..f432acc --- /dev/null +++ b/arch/mips/mach-bmips/Makefile @@ -0,0 +1,5 @@ +# +# SPDX-License-Identifier: GPL-2.0+ +#
+obj-y += dram.o diff --git a/arch/mips/mach-bmips/dram.c b/arch/mips/mach-bmips/dram.c new file mode 100644 index 0000000..b19b28a --- /dev/null +++ b/arch/mips/mach-bmips/dram.c @@ -0,0 +1,37 @@ +/*
- Copyright (C) 2016 Daniel Schwierzeck daniel.schwierzeck@gmail.com
- Copyright (C) 2017 Álvaro Fernández Rojas noltari@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#include <common.h> +#include <ram.h> +#include <dm.h>
+DECLARE_GLOBAL_DATA_PTR;
+int dram_init(void) +{
- struct ram_info ram;
- struct udevice *dev;
- int err;
- err = uclass_get_device(UCLASS_RAM, 0, &dev);
- if (err) {
debug("DRAM init failed: %d\n", err);return 0;- }
- err = ram_get_info(dev, &ram);
- if (err) {
debug("Cannot get DRAM size: %d\n", err);return 0;- }
- debug("SDRAM base=%zx, size=%x\n", ram.base, ram.size);
- gd->ram_size = ram.size;
- return 0;
+} diff --git a/include/configs/bmips_common.h b/include/configs/bmips_common.h new file mode 100644 index 0000000..3d67729 --- /dev/null +++ b/include/configs/bmips_common.h @@ -0,0 +1,27 @@ +/*
- Copyright (C) 2017 Álvaro Fernández Rojas noltari@gmail.com
- SPDX-License-Identifier: GPL-2.0+
- */
+#ifndef __CONFIG_BMIPS_COMMON_H +#define __CONFIG_BMIPS_COMMON_H
+/* RAM */ +#define CONFIG_SYS_MEMTEST_START 0xa0000000 +#define CONFIG_SYS_MEMTEST_END 0xa2000000
+/* Serial */ +#define CONFIG_BAUDRATE 115200
+/* Memory usage */ +#define CONFIG_SYS_MAXARGS 24 +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) +#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) +#define CONFIG_SYS_CBSIZE 512
+/* U-Boot */ +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_REMAKE_ELF
+#endif /* __CONFIG_BMIPS_COMMON_H */