Till now only the ranges in the ebc node are updated with the values currently configured in the PPC4xx EBC controller. With this patch now the NOR flash size is updated in the device tree blob as well.
Signed-off-by: Stefan Roese sr@denx.de Cc: Wolfgang Denk wd@denx.de --- cpu/ppc4xx/fdt.c | 33 ++++++++++++++++++++++++++++++--- 1 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/cpu/ppc4xx/fdt.c b/cpu/ppc4xx/fdt.c index 496e028..adf9d87 100644 --- a/cpu/ppc4xx/fdt.c +++ b/cpu/ppc4xx/fdt.c @@ -43,9 +43,19 @@ void __ft_board_setup(void *blob, bd_t *bd) u32 ranges[EBC_NUM_BANKS * 4]; u32 *p = ranges; char *ebc_path = "/plb/opb/ebc"; + char nor_path[16]; + char path[32]; + u32 *reg; + int offset; + int len; + struct fdt_property *prop;
ft_cpu_setup(blob, bd);
+ /* Some 405 PPC's have EBC as direct PLB child in the dts */ + if (fdt_path_offset(blob, ebc_path) < 0) + strcpy(ebc_path, "/plb/ebc"); + /* * Read 4xx EBC bus bridge registers to get mappings of the * peripheral banks into the OPB/PLB address space @@ -59,12 +69,29 @@ void __ft_board_setup(void *blob, bd_t *bd) *p++ = 0; *p++ = bxcr & EBC_BXCR_BAS_MASK; *p++ = EBC_BXCR_BANK_SIZE(bxcr); + + /* Try to update reg property in nor flash node too */ + strcpy(path, ebc_path); + sprintf(nor_path, "/nor_flash@%d,0", i); + strcat(path, nor_path); + offset = fdt_path_offset(blob, path); + prop = fdt_get_property_w(blob, offset, "reg", &len); + /* if prop == NULL then this is no NOR FLASH node */ + if (prop == NULL) + continue; + + reg = (u32 *)&prop->data[0]; + reg[2] = EBC_BXCR_BANK_SIZE(bxcr); + rc = fdt_find_and_setprop(blob, path, "reg", reg, + 3 * sizeof(u32), 1); + if (rc) { + printf("Unable to update property NOR mappings" + ", err=%s\n", fdt_strerror(rc)); + continue; + } } }
- /* Some 405 PPC's have EBC as direct PLB child in the dts */ - if (fdt_path_offset(blob, "/plb/opb/ebc") < 0) - strcpy(ebc_path, "/plb/ebc"); rc = fdt_find_and_setprop(blob, ebc_path, "ranges", ranges, (p - ranges) * sizeof(u32), 1); if (rc) {