[PATCH 06/12] treewide: Try to avoid the preprocessor with OF_REAL

Convert some of these occurences to C code, where it is easy to do. This should help encourage this approach to be used in new code.

Signed-off-by: Simon Glass sjg@chromium.org ---

arch/x86/cpu/intel_common/p2sb.c | 20 ++++---- doc/develop/driver-model/of-plat.rst | 6 +-- drivers/clk/clk_fixed_factor.c | 18 ++++---- drivers/clk/clk_fixed_rate.c | 7 +-- drivers/clk/rockchip/clk_rk3188.c | 8 ++-- drivers/clk/rockchip/clk_rk3288.c | 8 ++-- drivers/clk/rockchip/clk_rk3368.c | 8 ++-- drivers/clk/rockchip/clk_rk3399.c | 18 ++++---- drivers/misc/p2sb-uclass.c | 20 ++++---- drivers/mmc/fsl_esdhc_imx.c | 17 +++---- drivers/mmc/ftsdc010_mci.c | 33 +++++++------- drivers/mmc/rockchip_dw_mmc.c | 6 ++- drivers/mmc/rockchip_sdhci.c | 12 ++--- drivers/ram/rockchip/dmc-rk3368.c | 12 ++--- drivers/ram/rockchip/sdram_rk3188.c | 5 +- drivers/ram/rockchip/sdram_rk322x.c | 5 +- drivers/ram/rockchip/sdram_rk3288.c | 5 +- drivers/ram/rockchip/sdram_rk3399.c | 5 +- drivers/spi/rk_spi.c | 36 +++++++-------- drivers/spi/spi-uclass.c | 8 ++-- drivers/timer/rockchip_timer.c | 16 +++---- drivers/timer/timer-uclass.c | 68 ++++++++++++++-------------- 22 files changed, 176 insertions(+), 165 deletions(-)

diff --git a/arch/x86/cpu/intel_common/p2sb.c b/arch/x86/cpu/intel_common/p2sb.c index 5dc816396e5..5a7b30d94a1 100644 --- a/arch/x86/cpu/intel_common/p2sb.c +++ b/arch/x86/cpu/intel_common/p2sb.c @@ -159,16 +159,16 @@ static int p2sb_remove(struct udevice *dev)

static int p2sb_child_post_bind(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct p2sb_child_plat *pplat = dev_get_parent_plat(dev); - int ret; - u32 pid; - - ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid); - if (ret) - return ret; - pplat->pid = pid; -#endif + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct p2sb_child_plat *pplat = dev_get_parent_plat(dev); + int ret; + u32 pid; + + ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid); + if (ret) + return ret; + pplat->pid = pid; + }

return 0; } diff --git a/doc/develop/driver-model/of-plat.rst b/doc/develop/driver-model/of-plat.rst index 5f84f75d0fe..61aa2bc3ed9 100644 --- a/doc/develop/driver-model/of-plat.rst +++ b/doc/develop/driver-model/of-plat.rst @@ -215,16 +215,16 @@ For example:

static int mmc_of_to_plat(struct udevice *dev) { - #if CONFIG_IS_ENABLED(OF_REAL) + if (CONFIG_IS_ENABLED(OF_REAL)) { /* Decode the devicetree data */ struct mmc_plat *plat = dev_get_plat(dev); const void *blob = gd->fdt_blob; int node = dev_of_offset(dev);

plat->fifo_depth = fdtdec_get_int(blob, node, "fifo-depth", 0); - #endif + }

- return 0; + return 0; }

static int mmc_probe(struct udevice *dev) diff --git a/drivers/clk/clk_fixed_factor.c b/drivers/clk/clk_fixed_factor.c index 04871b4744d..41b0d9c0603 100644 --- a/drivers/clk/clk_fixed_factor.c +++ b/drivers/clk/clk_fixed_factor.c @@ -40,17 +40,17 @@ const struct clk_ops clk_fixed_factor_ops = {

static int clk_fixed_factor_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - int err; - struct clk_fixed_factor *ff = to_clk_fixed_factor(dev); + if (CONFIG_IS_ENABLED(OF_REAL)) { + int err; + struct clk_fixed_factor *ff = to_clk_fixed_factor(dev);

- err = clk_get_by_index(dev, 0, &ff->parent); - if (err) - return err; + err = clk_get_by_index(dev, 0, &ff->parent); + if (err) + return err;

- ff->div = dev_read_u32_default(dev, "clock-div", 1); - ff->mult = dev_read_u32_default(dev, "clock-mult", 1); -#endif + ff->div = dev_read_u32_default(dev, "clock-div", 1); + ff->mult = dev_read_u32_default(dev, "clock-mult", 1); + }

return 0; } diff --git a/drivers/clk/clk_fixed_rate.c b/drivers/clk/clk_fixed_rate.c index d0f25941d0a..e0dc4ab85f8 100644 --- a/drivers/clk/clk_fixed_rate.c +++ b/drivers/clk/clk_fixed_rate.c @@ -32,9 +32,10 @@ void clk_fixed_rate_ofdata_to_plat_(struct udevice *dev, struct clk_fixed_rate *plat) { struct clk *clk = &plat->clk; -#if CONFIG_IS_ENABLED(OF_REAL) - plat->fixed_rate = dev_read_u32_default(dev, "clock-frequency", 0); -#endif + if (CONFIG_IS_ENABLED(OF_REAL)) + plat->fixed_rate = dev_read_u32_default(dev, "clock-frequency", + 0); + /* Make fixed rate clock accessible from higher level struct clk */ /* FIXME: This is not allowed */ dev_set_uclass_priv(dev, clk); diff --git a/drivers/clk/rockchip/clk_rk3188.c b/drivers/clk/rockchip/clk_rk3188.c index 1751672f640..038cb55965e 100644 --- a/drivers/clk/rockchip/clk_rk3188.c +++ b/drivers/clk/rockchip/clk_rk3188.c @@ -540,11 +540,11 @@ static struct clk_ops rk3188_clk_ops = {

static int rk3188_clk_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct rk3188_clk_priv *priv = dev_get_priv(dev); + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct rk3188_clk_priv *priv = dev_get_priv(dev);

- priv->cru = dev_read_addr_ptr(dev); -#endif + priv->cru = dev_read_addr_ptr(dev); + }

return 0; } diff --git a/drivers/clk/rockchip/clk_rk3288.c b/drivers/clk/rockchip/clk_rk3288.c index ee222217a53..3b29992c3e5 100644 --- a/drivers/clk/rockchip/clk_rk3288.c +++ b/drivers/clk/rockchip/clk_rk3288.c @@ -957,11 +957,11 @@ static struct clk_ops rk3288_clk_ops = {

static int rk3288_clk_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct rk3288_clk_priv *priv = dev_get_priv(dev); + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct rk3288_clk_priv *priv = dev_get_priv(dev);

- priv->cru = dev_read_addr_ptr(dev); -#endif + priv->cru = dev_read_addr_ptr(dev); + }

return 0; } diff --git a/drivers/clk/rockchip/clk_rk3368.c b/drivers/clk/rockchip/clk_rk3368.c index 92762f5a1b9..79b9dfbaa46 100644 --- a/drivers/clk/rockchip/clk_rk3368.c +++ b/drivers/clk/rockchip/clk_rk3368.c @@ -596,11 +596,11 @@ static int rk3368_clk_probe(struct udevice *dev)

static int rk3368_clk_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct rk3368_clk_priv *priv = dev_get_priv(dev); + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct rk3368_clk_priv *priv = dev_get_priv(dev);

- priv->cru = dev_read_addr_ptr(dev); -#endif + priv->cru = dev_read_addr_ptr(dev); + }

return 0; } diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 209c726a4de..7d31a9f22a8 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -1402,11 +1402,12 @@ static int rk3399_clk_probe(struct udevice *dev)

static int rk3399_clk_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct rk3399_clk_priv *priv = dev_get_priv(dev); + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct rk3399_clk_priv *priv = dev_get_priv(dev); + + priv->cru = dev_read_addr_ptr(dev); + }

- priv->cru = dev_read_addr_ptr(dev); -#endif return 0; }

@@ -1614,11 +1615,12 @@ static int rk3399_pmuclk_probe(struct udevice *dev)

static int rk3399_pmuclk_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct rk3399_pmuclk_priv *priv = dev_get_priv(dev); + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct rk3399_pmuclk_priv *priv = dev_get_priv(dev); + + priv->pmucru = dev_read_addr_ptr(dev); + }

- priv->pmucru = dev_read_addr_ptr(dev); -#endif return 0; }

diff --git a/drivers/misc/p2sb-uclass.c b/drivers/misc/p2sb-uclass.c index 98d58b37c28..f24857a1515 100644 --- a/drivers/misc/p2sb-uclass.c +++ b/drivers/misc/p2sb-uclass.c @@ -183,16 +183,16 @@ int p2sb_set_port_id(struct udevice *dev, int portid)

static int p2sb_child_post_bind(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct p2sb_child_plat *pplat = dev_get_parent_plat(dev); - int ret; - u32 pid; - - ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid); - if (ret) - return ret; - pplat->pid = pid; -#endif + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct p2sb_child_plat *pplat = dev_get_parent_plat(dev); + int ret; + u32 pid; + + ret = dev_read_u32(dev, "intel,p2sb-port-id", &pid); + if (ret) + return ret; + pplat->pid = pid; + }

return 0; } diff --git a/drivers/mmc/fsl_esdhc_imx.c b/drivers/mmc/fsl_esdhc_imx.c index 9aee6273540..21b1f6ba004 100644 --- a/drivers/mmc/fsl_esdhc_imx.c +++ b/drivers/mmc/fsl_esdhc_imx.c @@ -1407,7 +1407,6 @@ __weak void init_clk_usdhc(u32 index)

static int fsl_esdhc_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) struct fsl_esdhc_priv *priv = dev_get_priv(dev); #if CONFIG_IS_ENABLED(DM_REGULATOR) struct udevice *vqmmc_dev; @@ -1415,10 +1414,12 @@ static int fsl_esdhc_of_to_plat(struct udevice *dev) #endif const void *fdt = gd->fdt_blob; int node = dev_of_offset(dev); - fdt_addr_t addr; unsigned int val;

+ if (!CONFIG_IS_ENABLED(OF_REAL)) + return 0; + addr = dev_read_addr(dev); if (addr == FDT_ADDR_T_NONE) return -EINVAL; @@ -1490,7 +1491,7 @@ static int fsl_esdhc_of_to_plat(struct udevice *dev) priv->vs18_enable = 1; } #endif -#endif + return 0; }

@@ -1594,11 +1595,11 @@ static int fsl_esdhc_probe(struct udevice *dev) return ret; }

-#if CONFIG_IS_ENABLED(OF_REAL) - ret = mmc_of_parse(dev, &plat->cfg); - if (ret) - return ret; -#endif + if (CONFIG_IS_ENABLED(OF_REAL)) { + ret = mmc_of_parse(dev, &plat->cfg); + if (ret) + return ret; + }

mmc = &plat->mmc; mmc->cfg = &plat->cfg; diff --git a/drivers/mmc/ftsdc010_mci.c b/drivers/mmc/ftsdc010_mci.c index b30da5b72a4..b8cafeb0431 100644 --- a/drivers/mmc/ftsdc010_mci.c +++ b/drivers/mmc/ftsdc010_mci.c @@ -390,28 +390,29 @@ static void ftsdc_setup_cfg(struct mmc_config *cfg, const char *name, int buswid

static int ftsdc010_mmc_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) struct ftsdc_priv *priv = dev_get_priv(dev); struct ftsdc010_chip *chip = &priv->chip;

- chip->name = dev->name; - chip->ioaddr = dev_read_addr_ptr(dev); - chip->buswidth = dev_read_u32_default(dev, "bus-width", 4); - chip->priv = dev; - priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); - priv->fifo_mode = dev_read_bool(dev, "fifo-mode"); - if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) { - if (dev_read_u32(dev, "max-frequency", &priv->minmax[1])) - return -EINVAL; - - priv->minmax[0] = 400000; /* 400 kHz */ - } else { - debug("%s: 'clock-freq-min-max' property was deprecated.\n", - __func__); + if (CONFIG_IS_ENABLED(OF_REAL)) { + chip->name = dev->name; + chip->ioaddr = dev_read_addr_ptr(dev); + chip->buswidth = dev_read_u32_default(dev, "bus-width", 4); + chip->priv = dev; + priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0); + priv->fifo_mode = dev_read_bool(dev, "fifo-mode"); + if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) { + if (dev_read_u32(dev, "max-frequency", &priv->minmax[1])) + return -EINVAL; + + priv->minmax[0] = 400000; /* 400 kHz */ + } else { + debug("%s: 'clock-freq-min-max' property was deprecated.\n", + __func__); + } } -#endif chip->sclk = priv->minmax[1]; chip->regs = chip->ioaddr; + return 0; }

diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c index fa297a0bc98..855c0e7af52 100644 --- a/drivers/mmc/rockchip_dw_mmc.c +++ b/drivers/mmc/rockchip_dw_mmc.c @@ -52,10 +52,12 @@ static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)

static int rockchip_dwmmc_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) struct rockchip_dwmmc_priv *priv = dev_get_priv(dev); struct dwmci_host *host = &priv->host;

+ if (!CONFIG_IS_ENABLED(OF_REAL)) + return 0; + host->name = dev->name; host->ioaddr = dev_read_addr_ptr(dev); host->buswidth = dev_read_u32_default(dev, "bus-width", 4); @@ -95,7 +97,7 @@ static int rockchip_dwmmc_of_to_plat(struct udevice *dev) debug("%s: 'clock-freq-min-max' property was deprecated.\n", __func__); } -#endif + return 0; }

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c index abe59e65071..93e58c2d3f1 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -83,13 +83,13 @@ static int arasan_sdhci_probe(struct udevice *dev)

static int arasan_sdhci_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct sdhci_host *host = dev_get_priv(dev); + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct sdhci_host *host = dev_get_priv(dev);

- host->name = dev->name; - host->ioaddr = dev_read_addr_ptr(dev); - host->bus_width = dev_read_u32_default(dev, "bus-width", 4); -#endif + host->name = dev->name; + host->ioaddr = dev_read_addr_ptr(dev); + host->bus_width = dev_read_u32_default(dev, "bus-width", 4); + }

return 0; } diff --git a/drivers/ram/rockchip/dmc-rk3368.c b/drivers/ram/rockchip/dmc-rk3368.c index 5a72283dac2..69c454a4ba8 100644 --- a/drivers/ram/rockchip/dmc-rk3368.c +++ b/drivers/ram/rockchip/dmc-rk3368.c @@ -883,13 +883,13 @@ static int rk3368_dmc_of_to_plat(struct udevice *dev) { int ret = 0;

-#if CONFIG_IS_ENABLED(OF_REAL) - struct rk3368_sdram_params *plat = dev_get_plat(dev); + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct rk3368_sdram_params *plat = dev_get_plat(dev);

- ret = regmap_init_mem(dev_ofnode(dev), &plat->map); - if (ret) - return ret; -#endif + ret = regmap_init_mem(dev_ofnode(dev), &plat->map); + if (ret) + return ret; + }

return ret; } diff --git a/drivers/ram/rockchip/sdram_rk3188.c b/drivers/ram/rockchip/sdram_rk3188.c index 38d25c8b780..d9ed8adfcfd 100644 --- a/drivers/ram/rockchip/sdram_rk3188.c +++ b/drivers/ram/rockchip/sdram_rk3188.c @@ -816,10 +816,12 @@ static int setup_sdram(struct udevice *dev)

static int rk3188_dmc_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) struct rk3188_sdram_params *params = dev_get_plat(dev); int ret;

+ if (!CONFIG_IS_ENABLED(OF_REAL)) + return 0; + /* rk3188 supports only one-channel */ params->num_channels = 1; ret = dev_read_u32_array(dev, "rockchip,pctl-timing", @@ -846,7 +848,6 @@ static int rk3188_dmc_of_to_plat(struct udevice *dev) ret = regmap_init_mem(dev_ofnode(dev), &params->map); if (ret) return ret; -#endif

return 0; } diff --git a/drivers/ram/rockchip/sdram_rk322x.c b/drivers/ram/rockchip/sdram_rk322x.c index fd12008ed90..30e9c3ddc45 100644 --- a/drivers/ram/rockchip/sdram_rk322x.c +++ b/drivers/ram/rockchip/sdram_rk322x.c @@ -716,12 +716,14 @@ out:

static int rk322x_dmc_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) struct rk322x_sdram_params *params = dev_get_plat(dev); const void *blob = gd->fdt_blob; int node = dev_of_offset(dev); int ret;

+ if (!CONFIG_IS_ENABLED(OF_REAL)) + return 0; + params->num_channels = 1;

ret = fdtdec_get_int_array(blob, node, "rockchip,pctl-timing", @@ -748,7 +750,6 @@ static int rk322x_dmc_of_to_plat(struct udevice *dev) ret = regmap_init_mem(dev_ofnode(dev), &params->map); if (ret) return ret; -#endif

return 0; } diff --git a/drivers/ram/rockchip/sdram_rk3288.c b/drivers/ram/rockchip/sdram_rk3288.c index 2cb034f263f..f3e4a2808ab 100644 --- a/drivers/ram/rockchip/sdram_rk3288.c +++ b/drivers/ram/rockchip/sdram_rk3288.c @@ -973,10 +973,12 @@ static int setup_sdram(struct udevice *dev)

static int rk3288_dmc_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) struct rk3288_sdram_params *params = dev_get_plat(dev); int ret;

+ if (!CONFIG_IS_ENABLED(OF_REAL)) + return 0; + /* Rk3288 supports dual-channel, set default channel num to 2 */ params->num_channels = 2; ret = dev_read_u32_array(dev, "rockchip,pctl-timing", @@ -1008,7 +1010,6 @@ static int rk3288_dmc_of_to_plat(struct udevice *dev) ret = regmap_init_mem(dev_ofnode(dev), &params->map); if (ret) return ret; -#endif

return 0; } diff --git a/drivers/ram/rockchip/sdram_rk3399.c b/drivers/ram/rockchip/sdram_rk3399.c index c9631af2643..ce33fbbd7a6 100644 --- a/drivers/ram/rockchip/sdram_rk3399.c +++ b/drivers/ram/rockchip/sdram_rk3399.c @@ -3013,10 +3013,12 @@ static int sdram_init(struct dram_info *dram,

static int rk3399_dmc_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) struct rockchip_dmc_plat *plat = dev_get_plat(dev); int ret;

+ if (!CONFIG_IS_ENABLED(OF_REAL)) + return 0; + ret = dev_read_u32_array(dev, "rockchip,sdram-params", (u32 *)&plat->sdram_params, sizeof(plat->sdram_params) / sizeof(u32)); @@ -3029,7 +3031,6 @@ static int rk3399_dmc_of_to_plat(struct udevice *dev) if (ret) printf("%s: regmap failed %d\n", __func__, ret);

-#endif return 0; }

diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c index e504e306fd7..8309a5301f2 100644 --- a/drivers/spi/rk_spi.c +++ b/drivers/spi/rk_spi.c @@ -193,31 +193,31 @@ static int conv_of_plat(struct udevice *dev)

static int rockchip_spi_of_to_plat(struct udevice *bus) { -#if CONFIG_IS_ENABLED(OF_REAL) struct rockchip_spi_plat *plat = dev_get_plat(bus); struct rockchip_spi_priv *priv = dev_get_priv(bus); int ret;

- plat->base = dev_read_addr(bus); + if (CONFIG_IS_ENABLED(OF_REAL)) { + plat->base = dev_read_addr(bus);

- ret = clk_get_by_index(bus, 0, &priv->clk); - if (ret < 0) { - debug("%s: Could not get clock for %s: %d\n", __func__, - bus->name, ret); - return ret; - } + ret = clk_get_by_index(bus, 0, &priv->clk); + if (ret < 0) { + debug("%s: Could not get clock for %s: %d\n", __func__, + bus->name, ret); + return ret; + }

- plat->frequency = - dev_read_u32_default(bus, "spi-max-frequency", 50000000); - plat->deactivate_delay_us = - dev_read_u32_default(bus, "spi-deactivate-delay", 0); - plat->activate_delay_us = - dev_read_u32_default(bus, "spi-activate-delay", 0); + plat->frequency = dev_read_u32_default(bus, "spi-max-frequency", + 50000000); + plat->deactivate_delay_us = + dev_read_u32_default(bus, "spi-deactivate-delay", 0); + plat->activate_delay_us = + dev_read_u32_default(bus, "spi-activate-delay", 0);

- debug("%s: base=%x, max-frequency=%d, deactivate_delay=%d\n", - __func__, (uint)plat->base, plat->frequency, - plat->deactivate_delay_us); -#endif + debug("%s: base=%x, max-frequency=%d, deactivate_delay=%d\n", + __func__, (uint)plat->base, plat->frequency, + plat->deactivate_delay_us); + }

return 0; } diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c index 655fb1407aa..f8ec312d715 100644 --- a/drivers/spi/spi-uclass.c +++ b/drivers/spi/spi-uclass.c @@ -176,11 +176,11 @@ static int spi_child_post_bind(struct udevice *dev)

static int spi_post_probe(struct udevice *bus) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct dm_spi_bus *spi = dev_get_uclass_priv(bus); + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct dm_spi_bus *spi = dev_get_uclass_priv(bus);

- spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0); -#endif + spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0); + } #if defined(CONFIG_NEEDS_MANUAL_RELOC) struct dm_spi_ops *ops = spi_get_ops(bus); static int reloc_done; diff --git a/drivers/timer/rockchip_timer.c b/drivers/timer/rockchip_timer.c index 96621479105..62eacb98689 100644 --- a/drivers/timer/rockchip_timer.c +++ b/drivers/timer/rockchip_timer.c @@ -55,8 +55,7 @@ ulong timer_get_boot_us(void) /* The timer is available */ rate = timer_get_rate(gd->timer); timer_get_count(gd->timer, &ticks); -#if CONFIG_IS_ENABLED(OF_REAL) - } else if (ret == -EAGAIN) { + } else if (CONFIG_IS_ENABLED(OF_REAL) && ret == -EAGAIN) { /* We have been called so early that the DM is not ready,... */ ofnode node = offset_to_ofnode(-1); struct rk_timer *timer = NULL; @@ -79,7 +78,6 @@ ulong timer_get_boot_us(void) debug("%s: could not read clock-frequency\n", __func__); return 0; } -#endif } else { return 0; } @@ -100,13 +98,13 @@ static u64 rockchip_timer_get_count(struct udevice *dev)

static int rockchip_clk_of_to_plat(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct rockchip_timer_priv *priv = dev_get_priv(dev); + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct rockchip_timer_priv *priv = dev_get_priv(dev);

- priv->timer = dev_read_addr_ptr(dev); - if (!priv->timer) - return -ENOENT; -#endif + priv->timer = dev_read_addr_ptr(dev); + if (!priv->timer) + return -ENOENT; + }

return 0; } diff --git a/drivers/timer/timer-uclass.c b/drivers/timer/timer-uclass.c index 52bddb9654f..6ea9e39e126 100644 --- a/drivers/timer/timer-uclass.c +++ b/drivers/timer/timer-uclass.c @@ -50,27 +50,29 @@ unsigned long notrace timer_get_rate(struct udevice *dev)

static int timer_pre_probe(struct udevice *dev) { -#if CONFIG_IS_ENABLED(OF_REAL) - struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); - struct clk timer_clk; - int err; - ulong ret; + if (CONFIG_IS_ENABLED(OF_REAL)) { + struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); + struct clk timer_clk; + int err; + ulong ret;

- /* It is possible that a timer device has a null ofnode */ - if (!dev_has_ofnode(dev)) - return 0; + /* + * It is possible that a timer device has a null ofnode + */ + if (!dev_has_ofnode(dev)) + return 0;

- err = clk_get_by_index(dev, 0, &timer_clk); - if (!err) { - ret = clk_get_rate(&timer_clk); - if (IS_ERR_VALUE(ret)) - return ret; - uc_priv->clock_rate = ret; - } else { - uc_priv->clock_rate = - dev_read_u32_default(dev, "clock-frequency", 0); + err = clk_get_by_index(dev, 0, &timer_clk); + if (!err) { + ret = clk_get_rate(&timer_clk); + if (IS_ERR_VALUE(ret)) + return ret; + uc_priv->clock_rate = ret; + } else { + uc_priv->clock_rate = + dev_read_u32_default(dev, "clock-frequency", 0); + } } -#endif

return 0; } @@ -136,23 +138,23 @@ int notrace dm_timer_init(void) if (gd->dm_root == NULL) return -EAGAIN;

-#if CONFIG_IS_ENABLED(OF_REAL) - /* Check for a chosen timer to be used for tick */ - node = ofnode_get_chosen_node("tick-timer"); - - if (ofnode_valid(node) && - uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) { - /* - * If the timer is not marked to be bound before - * relocation, bind it anyway. - */ - if (!lists_bind_fdt(dm_root(), node, &dev, false)) { - ret = device_probe(dev); - if (ret) - return ret; + if (CONFIG_IS_ENABLED(OF_REAL)) { + /* Check for a chosen timer to be used for tick */ + node = ofnode_get_chosen_node("tick-timer"); + + if (ofnode_valid(node) && + uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) { + /* + * If the timer is not marked to be bound before + * relocation, bind it anyway. + */ + if (!lists_bind_fdt(dm_root(), node, &dev, false)) { + ret = device_probe(dev); + if (ret) + return ret; + } } } -#endif

if (!dev) { /* Fall back to the first available timer */