
On Monday 07 April 2014 10:51 PM, Tom Rini wrote:
On Thu, Apr 03, 2014 at 08:45:42PM +0530, Jagan Teki wrote:
On Thu, Apr 3, 2014 at 5:22 PM, Tom Rinitrini@ti.com wrote:
From: "Poddar, Sourav"sourav.poddar@ti.com
Bulk erase is not happening properly on dra7 due to erase timing constraints, add a delay so that erase timing constraints are properly met.
Signed-off-by: Sourav Poddarsourav.poddar@ti.com Tested-by: Yebio Mesfinymesfin@ti.com
drivers/spi/ti_qspi.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c index dfa5d0c..c5d2245 100644 --- a/drivers/spi/ti_qspi.c +++ b/drivers/spi/ti_qspi.c @@ -314,6 +314,9 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, qslave->cmd |= QSPI_RD_SNGL; debug("rx cmd %08x dc %08x\n", qslave->cmd, qslave->dc);
#ifdef CONFIG_DRA7XX
udelay(500);
#endif writel(qslave->cmd,&qslave->base->cmd); status = readl(&qslave->base->status); timeout = QSPI_TIMEOUT;
Can't we fix this? discussed the same in previous version thread as well.
Sorry, I kicked out v2 before checking my mbox again. Sourav, do you have some time to look at this again?
I can look at this sometime this week, but I am not sure if there is anything which can be done. I had tried few stuffs to get rid of this in the past, but those attempts failed. Still, I will check if there is anything more that can be done to get rid of this.