Move CONFIG_SYS_FPGA0_BASE, CONFIG_SYS_FPGA0_SIZE, CONFIG_SYS_FPGA1_BASE, and CONFIG_SYS_FPGA1_SIZE to Kconfig.
Signed-off-by: Mario Six mario.six@gdsys.cc ---
board/gdsys/mpc8308/Kconfig | 23 +++++++++++++++++++++++ include/configs/hrcon.h | 7 ------- include/configs/strider.h | 7 ------- scripts/config_whitelist.txt | 2 -- 4 files changed, 23 insertions(+), 16 deletions(-)
diff --git a/board/gdsys/mpc8308/Kconfig b/board/gdsys/mpc8308/Kconfig index cb29c25c65..c0247214a9 100644 --- a/board/gdsys/mpc8308/Kconfig +++ b/board/gdsys/mpc8308/Kconfig @@ -1,3 +1,26 @@ + +config SYS_FPGA0_BASE + hex + default E0600000 + help + The base address of the first FPGA's register map. + +config SYS_FPGA0_SIZE + hex + default 1 + help + The base address of the first FPGA's register map. + +config SYS_FPGA1_BASE + hex + help + The base address of the second FPGA's register map. + +config SYS_FPGA1_SIZE + hex + help + The base address of the second FPGA's register map. + if TARGET_HRCON
config SYS_BOARD diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index 405129b7e2..5db623d28e 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -243,12 +243,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-/* - * FPGA - */ -#define CONFIG_SYS_FPGA0_BASE 0xE0600000 -#define CONFIG_SYS_FPGA0_SIZE 1 /* FPGA size is 1M */ - /* Window base at FPGA base */ #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_FPGA0_BASE #define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_1MB) @@ -266,7 +260,6 @@ | OR_GPCM_TRLX_SET \ | OR_GPCM_EHTR_SET)
-#define CONFIG_SYS_FPGA_BASE(k) CONFIG_SYS_FPGA0_BASE #define CONFIG_SYS_FPGA_DONE(k) 0x0010
#define CONFIG_SYS_FPGA_COUNT 1 diff --git a/include/configs/strider.h b/include/configs/strider.h index 994ac73e13..8487a188a7 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -243,12 +243,6 @@ #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-/* - * FPGA - */ -#define CONFIG_SYS_FPGA0_BASE 0xE0600000 -#define CONFIG_SYS_FPGA0_SIZE 1 /* FPGA size is 1M */ - /* Window base at FPGA base */ #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_FPGA0_BASE #define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_1MB) @@ -265,7 +259,6 @@ | OR_GPCM_TRLX_CLEAR \ | OR_GPCM_EHTR_CLEAR)
-#define CONFIG_SYS_FPGA_BASE(k) CONFIG_SYS_FPGA0_BASE #define CONFIG_SYS_FPGA_DONE(k) 0x0010
#define CONFIG_SYS_FPGA_COUNT 1 diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 4c136a6502..64a4b1190e 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -3086,8 +3086,6 @@ CONFIG_SYS_FORM_PMC CONFIG_SYS_FORM_PMC_XMC CONFIG_SYS_FORM_VME CONFIG_SYS_FORM_XMC -CONFIG_SYS_FPGA0_BASE -CONFIG_SYS_FPGA0_SIZE CONFIG_SYS_FPGAREG_DATE CONFIG_SYS_FPGAREG_DIPSW CONFIG_SYS_FPGAREG_FREQ