
This patch is good. Kim, please apply. It fixes bug 292.
However, ....
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/ MPC8349EMDS.h index 5bed2d0..d06b51d 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -60,17 +60,6 @@ #endif #endif -#define CFG_SCCR_INIT (SCCR_DEFAULT & (~SCCR_CLK_MASK)) -#define CFG_SCCR_TSEC1CM SCCR_TSEC1CM_1 /* TSEC1 clock setting */ -#define CFG_SCCR_TSEC2CM SCCR_TSEC2CM_1 /* TSEC2 clock setting */ -#define CFG_SCCR_ENCCM SCCR_ENCCM_3 /* ENC clock setting */ -#define CFG_SCCR_USBCM SCCR_USBCM_3 /* USB clock setting */ -#define CFG_SCCR_VAL ( CFG_SCCR_INIT \
| CFG_SCCR_TSEC1CM \
| CFG_SCCR_TSEC2CM \
| CFG_SCCR_ENCCM \
| CFG_SCCR_USBCM )
I think your patch omits the new values of CFG_SCCR_TSEC1CM, CFG_SCCR_TSEC2CM, CFG_SCCR_ENCCM, and CFG_SCCR_USBCM. Your changelog says these values are bogus, but without defining the macros, the code in cpu_init_f() won't be compiled.
This is on purpose, the boards in question are using the default value of SCCR and have been. Kim added the CFG_SCCR_* but it was never actually used by the boards.
If someone feels the default value should be changed for the boards, it should be a follow on patch to this one.
[snip]
You can also probably get rid of these macros in mpc83xx.h:
#define SCCR_ENCCM_0 0x00000000 #define SCCR_ENCCM_1 0x01000000 #define SCCR_ENCCM_2 0x02000000 #define SCCR_ENCCM_3 0x03000000 #define SCCR_TSEC1CM_0 0x00000000 #define SCCR_TSEC1CM_1 0x40000000 #define SCCR_TSEC1CM_2 0x80000000 #define SCCR_TSEC1CM_3 0xC0000000 #define SCCR_TSEC2CM_0 0x00000000 #define SCCR_TSEC2CM_1 0x10000000 #define SCCR_TSEC2CM_2 0x20000000 #define SCCR_TSEC2CM_3 0x30000000 #define SCCR_USBCM_0 0x00000000 #define SCCR_USBCM_1 0x00500000 #define SCCR_USBCM_2 0x00A00000 #define SCCR_USBCM_3 0x00F00000
Don't see any harm in having them.
- k