
13 Oct
2015
13 Oct
'15
5:24 p.m.
On Fri, Oct 9, 2015 at 5:38 PM, Anthony Felice tony.felice@timesys.com wrote:
This commit fixes a typo in vf610twr DRAM init that was causing a hang in U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc (vf610: refactor DDRMC code).
Signed-off-by: Anthony Felice tony.felice@timesys.com
Seems fine for me. Stefano?
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