Intel Braswell SoC is the follow-up processor of BayTrail on the Atom product line. This support utilizes Intel FSP firmware to initialize the SoC. Note its FSP is spec 1.1 compliant, but it is still backward compatible with spec 1.0. For simplicity, we are using the spec 1.0 APIs to do the initialization.
There are 3 big differences from previous SoCs: - No ICH6 legacy GPIO controller. FSP uses a custom table to configure the pin mux and pads. - No legacy VGA BIOS is supplied. Instead a new type of binary called Intel Video BIOS Table (VBT) is used by FSP to initialize the integrated graphics device. - No EHCI controller, only an xHCI controller integrated.
The support is validated on Intel Cherry Hill board, a board based on Intel Braswell SoC.
This series is available at u-boot-x86/braswell-working.
Bin Meng (13): x86: tsc: Add Airmont reference clock values x86: fsp: Update struct common_buf for FSP spec 1.1 x86: fsp: Add FSP_GRAPHICS_INFO_HOB x86: Add Video BIOS Table (VBT) related Kconfig options tools: binman: Add a new entry type for Intel VBT x86: dts: Include Intel Video BIOS Table in the ROM image x86: dm: video: Add a framebuffer driver that utilizes VBT x86: fsp: Update fsp command to show spec 1.1 header x86: Add Intel Braswell SoC support x86: braswell: Add microcode for B0/C0/D0 stepping SoC x86: braswell: Add FSP configuration x86: braswell: Disable PUNIT power configuration for B0 stepping x86: Support Intel Cherry Hill board
arch/x86/Kconfig | 43 + arch/x86/cpu/Makefile | 1 + arch/x86/cpu/braswell/Kconfig | 38 + arch/x86/cpu/braswell/Makefile | 7 + arch/x86/cpu/braswell/braswell.c | 36 + arch/x86/cpu/braswell/cpu.c | 170 + arch/x86/cpu/braswell/early_uart.c | 86 + arch/x86/cpu/braswell/fsp_configs.c | 164 + arch/x86/dts/Makefile | 1 + arch/x86/dts/cherryhill.dts | 215 + arch/x86/dts/microcode/m01406c2220.dtsi | 4308 ++++++++++++++++++++ arch/x86/dts/microcode/m01406c3363.dtsi | 4308 ++++++++++++++++++++ arch/x86/dts/microcode/m01406c440a.dtsi | 4308 ++++++++++++++++++++ arch/x86/dts/u-boot.dtsi | 6 + .../include/asm/arch-braswell/fsp/fsp_configs.h | 89 + arch/x86/include/asm/arch-braswell/fsp/fsp_vpd.h | 172 + arch/x86/include/asm/arch-braswell/gpio.h | 234 ++ arch/x86/include/asm/arch-braswell/iomap.h | 50 + arch/x86/include/asm/fsp/fsp_api.h | 3 +- arch/x86/include/asm/fsp/fsp_hob.h | 34 + arch/x86/include/asm/fsp/fsp_infoheader.h | 9 +- arch/x86/include/asm/fsp/fsp_support.h | 12 + arch/x86/lib/fsp/Makefile | 1 + arch/x86/lib/fsp/cmd_fsp.c | 24 +- arch/x86/lib/fsp/fsp_graphics.c | 124 + arch/x86/lib/fsp/fsp_support.c | 7 + board/intel/Kconfig | 10 + board/intel/cherryhill/Kconfig | 25 + board/intel/cherryhill/MAINTAINERS | 6 + board/intel/cherryhill/Makefile | 7 + board/intel/cherryhill/cherryhill.c | 596 +++ board/intel/cherryhill/start.S | 9 + configs/cherryhill_defconfig | 36 + doc/README.x86 | 30 + drivers/timer/tsc_timer.c | 17 +- include/configs/cherryhill.h | 22 + tools/binman/etype/intel_vbt.py | 14 + tools/binman/func_test.py | 9 +- tools/binman/test/46_intel-vbt.dts | 14 + 39 files changed, 15233 insertions(+), 12 deletions(-) create mode 100644 arch/x86/cpu/braswell/Kconfig create mode 100644 arch/x86/cpu/braswell/Makefile create mode 100644 arch/x86/cpu/braswell/braswell.c create mode 100644 arch/x86/cpu/braswell/cpu.c create mode 100644 arch/x86/cpu/braswell/early_uart.c create mode 100644 arch/x86/cpu/braswell/fsp_configs.c create mode 100644 arch/x86/dts/cherryhill.dts create mode 100644 arch/x86/dts/microcode/m01406c2220.dtsi create mode 100644 arch/x86/dts/microcode/m01406c3363.dtsi create mode 100644 arch/x86/dts/microcode/m01406c440a.dtsi create mode 100644 arch/x86/include/asm/arch-braswell/fsp/fsp_configs.h create mode 100644 arch/x86/include/asm/arch-braswell/fsp/fsp_vpd.h create mode 100644 arch/x86/include/asm/arch-braswell/gpio.h create mode 100644 arch/x86/include/asm/arch-braswell/iomap.h create mode 100644 arch/x86/lib/fsp/fsp_graphics.c create mode 100644 board/intel/cherryhill/Kconfig create mode 100644 board/intel/cherryhill/MAINTAINERS create mode 100644 board/intel/cherryhill/Makefile create mode 100644 board/intel/cherryhill/cherryhill.c create mode 100644 board/intel/cherryhill/start.S create mode 100644 configs/cherryhill_defconfig create mode 100644 include/configs/cherryhill.h create mode 100644 tools/binman/etype/intel_vbt.py create mode 100644 tools/binman/test/46_intel-vbt.dts