This is not needed now that we have moved chromebook_link and cros_ec to driver model.
Signed-off-by: Simon Glass sjg@chromium.org ---
include/fdtdec.h | 1 - lib/fdtdec.c | 1 - 2 files changed, 2 deletions(-)
diff --git a/include/fdtdec.h b/include/fdtdec.h index 51a9471..2732e97 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -158,7 +158,6 @@ enum fdt_compat_id { COMPAT_NXP_PTN3460, /* NXP PTN3460 DP/LVDS bridge */ COMPAT_SAMSUNG_EXYNOS_SYSMMU, /* Exynos sysmmu */ COMPAT_PARADE_PS8625, /* Parade PS8622 EDP->LVDS bridge */ - COMPAT_INTEL_LPC, /* Intel Low Pin Count I/F */ COMPAT_INTEL_MICROCODE, /* Intel microcode update */ COMPAT_MEMORY_SPD, /* Memory SPD information */ COMPAT_INTEL_PANTHERPOINT_AHCI, /* Intel Pantherpoint AHCI */ diff --git a/lib/fdtdec.c b/lib/fdtdec.c index bfcf7f9..5f51403 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -66,7 +66,6 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(COMPAT_NXP_PTN3460, "nxp,ptn3460"), COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), COMPAT(PARADE_PS8625, "parade,ps8625"), - COMPAT(COMPAT_INTEL_LPC, "intel,bd82x6x-lpc"), COMPAT(INTEL_MICROCODE, "intel,microcode"), COMPAT(MEMORY_SPD, "memory-spd"), COMPAT(INTEL_PANTHERPOINT_AHCI, "intel,pantherpoint-ahci"),