On 06/04/2018 03:27 PM, Jagan Teki wrote:
On Fri, May 25, 2018 at 1:28 AM, Marek Vasut marex@denx.de wrote:
The clean_bar() function resets the SPI NOR BAR register to 0, but does not set the flash->curr_bar to 0 , therefore those two can get out of sync, which could ultimatelly result in corrupted flash content.
The simplest test case is this:
=> mw 0x10000000 0x1234abcd 0x4000 => sf probe => sf erase 0x1000000 0x10000 => sf write 0x10000000 0x1000000 0x10000
=> sf probe ; sf read 0x12000000 0 0x10000 ; md 0x12000000
That is, erase a sector above the 16 MiB boundary and write it with random pre-configured data. What will actually happen without this patch is the sector will be erased, but the data will be written to BAR 0 offset 0x0 in the flash.
Why it would write it at 0x0
write ops -> write_bar -> identifies bank sel (here it's 1) -> write bank register -> flash->bank_curr
then actual data will written from 16MB offset and call clean_bar
I am not sure what you're trying to say here, but maybe re-read the commit message again ? The erase cycle is needed before the write cycle to put the SPI NOR framework into inconsistent state, at which point it will corrupt the content of the flash at 0x0.