4 Dec
2017
4 Dec
'17
5:46 p.m.
On 12/04/2017 01:31 AM, Yuantian Tang wrote:
These PP2C and PP3C registers control the configuration of the PHY control OOB timing for the COMINIT/COMWAKE parameters respectively for sata port. Overwrite default values with calculated ones to get better OOB timing.
Signed-off-by: Tang Yuantian andy.tang@nxp.com
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 6 ++++++ arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 ++ 2 files changed, 8 insertions(+)
Andy,
Maybe it was obvious to you, but I couldn't understand why and what you are changing, except you overwrite two registers.
By the way, you may want to add SATA (in upper case) in the subject.
York