30 Jan
2019
30 Jan
'19
10:05 a.m.
The i.MX6 SOM and development kits have undergone significant updates and changes over the past few months. This re-sync's the U-Boot with Logic PD's BSP. Signed-off-by: Adam Ford aford173@gmail.com diff --git a/arch/arm/dts/imx6-logicpd-baseboard.dtsi b/arch/arm/dts/imx6-logicpd-baseboard.dtsi new file mode 100644 index 0000000000..303c09334b --- /dev/null +++ b/arch/arm/dts/imx6-logicpd-baseboard.dtsi @@ -0,0 +1,596 @@ +/*
- Copyright 2018 Logic PD, Inc.
- Based on SabreSD, Copyright 2016 Freescale Semiconductor, Inc.
- This file is dual-licensed: you can use it either under the terms
- of the GPL or the X11 license, at your option. Note that this dual
- licensing only applies to this file, and not this project as a
- whole.
- a) This file is free software; you can redistribute it and/or
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation; either version 2 of the
License, or (at your option) any later version.
This file is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
- Or, alternatively,
- b) Permission is hereby granted, free of charge, to any person
obtaining a copy of this software and associated documentation
files (the "Software"), to deal in the Software without
restriction, including without limitation the rights to use,
copy, modify, merge, publish, distribute, sublicense, and/or
sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following
conditions:
The above copyright notice and this permission notice shall be
included in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
OTHER DEALINGS IN THE SOFTWARE.- */
+/ {
- keyboard {
compatible = "gpio-keys";btn0 {gpios = <&pcf8575 0 GPIO_ACTIVE_LOW>;label = "btn0";linux,code = <KEY_WAKEUP>;debounce-interval = <10>;wakeup-source;};btn1 {gpios = <&pcf8575 1 GPIO_ACTIVE_LOW>;label = "btn1";linux,code = <KEY_WAKEUP>;debounce-interval = <10>;wakeup-source;};btn2 {gpios = <&pcf8575 2 GPIO_ACTIVE_LOW>;label = "btn2";linux,code = <KEY_WAKEUP>;debounce-interval = <10>;wakeup-source;};btn3 {gpios = <&pcf8575 3 GPIO_ACTIVE_LOW>;label = "btn3";linux,code = <KEY_WAKEUP>;debounce-interval = <10>;wakeup-source;};- };
- leds {
compatible = "gpio-leds";gen_led0 {label = "led0";pinctrl-names = "default";pinctrl-0 = <&pinctrl_led0>;gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;linux,default-trigger = "cpu0";};gen_led1 {label = "led1";gpios = <&pcf8575 8 GPIO_ACTIVE_HIGH>;};gen_led2 {label = "led2";gpios = <&pcf8575 9 GPIO_ACTIVE_HIGH>;linux,default-trigger = "heartbeat";};gen_led3 {label = "led3";gpios = <&pcf8575 10 GPIO_ACTIVE_HIGH>;linux,default-trigger = "default-on";};- };
- reg_usb_otg_vbus: regulator-otg-vbus@0 {
compatible = "regulator-fixed";regulator-name = "usb_otg_vbus";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;enable-active-high;- };
- reg_usb_h1_vbus: regulator-usbh1vbus@1 {
compatible = "regulator-fixed";regulator-name = "usb_h1_vbus";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;- };
- reg_3v3: regulator-3v3@2 {
pinctrl-names = "default";pinctrl-0 = <&pinctrl_reg_3v3>;compatible = "regulator-fixed";regulator-name = "reg_3v3";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;enable-active-high;regulator-always-on;- };
- reg_enet: regulator-ethernet@3 {
pinctrl-names = "default";pinctrl-0 = <&pinctrl_enet_pwr>;compatible = "regulator-fixed";regulator-name = "ethernet-supply";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;startup-delay-us = <70000>;enable-active-high;vin-supply = <&sw4_reg>;- };
- reg_audio: regulator-audio@4 {
pinctrl-names = "default";pinctrl-0 = <&pinctrl_reg_audio>;compatible = "regulator-fixed";regulator-name = "3v3_aud";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;enable-active-high;regulator-always-on;vin-supply = <®_3v3>;- };
- reg_hdmi: regulator-hdmi@5 {
pinctrl-names = "default";pinctrl-0 = <&pinctrl_reg_hdmi>;compatible = "regulator-fixed";regulator-name = "hdmi-supply";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>;enable-active-high;vin-supply = <®_3v3>;- };
- reg_uart3: regulator-uart3@6 {
pinctrl-names = "default";pinctrl-0 = <&pinctrl_reg_uart3>;compatible = "regulator-fixed";regulator-name = "uart3-supply";gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;enable-active-high;regulator-always-on;vin-supply = <®_3v3>;- };
- reg_1v8: regulator-1v8@7 {
pinctrl-names = "default";pinctrl-0 = <&pinctrl_reg_1v8>;compatible = "regulator-fixed";regulator-name = "1v8-supply";gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>;enable-active-high;regulator-always-on;vin-supply = <®_3v3>;- };
- reg_pcie: regulator@8 {
compatible = "regulator-fixed";pinctrl-names = "default";pinctrl-0 = <&pinctrl_pcie_reg>;regulator-name = "MPCIE_3V3";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;enable-active-high;- };
- mipi_pwr: regulator@9 {
compatible = "regulator-fixed";pinctrl-names = "default";pinctrl-0 = <&pinctrl_mipi_pwr>;regulator-name = "mipi_pwr_en";regulator-min-microvolt = <2800000>;regulator-max-microvolt = <2800000>;gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;enable-active-high;- };
- sound {
compatible = "fsl,imx-audio-wm8962";model = "wm8962-audio";ssi-controller = <&ssi2>;audio-codec = <&codec>;audio-routing ="Headphone Jack", "HPOUTL","Headphone Jack", "HPOUTR","Ext Spk", "SPKOUTL","Ext Spk", "SPKOUTR","AMIC", "MICBIAS","IN3R", "AMIC";mux-int-port = <2>;mux-ext-port = <4>;- };
+};
+&audmux {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_audmux>;
- status = "okay";
+};
+&ecspi1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ecspi1>;
- status = "disabled";
+};
+&pwm3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pwm3>;
+};
+&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
- status = "okay";
+};
+&usbh1 {
- vbus-supply = <®_usb_h1_vbus>;
- status = "okay";
+};
+&usbotg {
- vbus-supply = <®_usb_otg_vbus>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbotg>;
- disable-over-current;
- status = "okay";
+};
+&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;
- phy-mode = "rgmii";
- phy-reset-duration = <10>;
- phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
- phy-supply = <®_enet>;
- interrupt-parent = <&gpio1>;
- interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
- status = "okay";
+};
+&usdhc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc2>;
- pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
- pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
- no-1-8-v;
- keep-power-in-suspend;
- status = "okay";
+};
+&i2c1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_i2c1>;
- clock-frequency = <400000>;
- status = "okay";
- codec: wm8962@1a {
compatible = "wlf,wm8962";reg = <0x1a>;clocks = <&clks IMX6QDL_CLK_CKO>;clock-names = "xclk";DCVDD-supply = <®_audio>;DBVDD-supply = <®_audio>;AVDD-supply = <®_audio>;CPVDD-supply = <®_audio>;MICVDD-supply = <®_audio>;PLLVDD-supply = <®_audio>;SPKVDD1-supply = <®_audio>;SPKVDD2-supply = <®_audio>;gpio-cfg = <0x0000 /* 0:Default */0x0000 /* 1:Default */0x0013 /* 2:FN_DMICCLK */0x0000 /* 3:Default */0x8014 /* 4:FN_DMICCDAT */0x0000 /* 5:Default */>;- };
+};
+&i2c3 {
- ov5640: camera@10 {
compatible = "ovti,ov5640";pinctrl-names = "default";pinctrl-0 = <&pinctrl_ov5640>;reg = <0x10>;clocks = <&clks IMX6QDL_CLK_CKO>;clock-names = "xclk";DOVDD-supply = <&mipi_pwr>;AVDD-supply = <&mipi_pwr>;DVDD-supply = <&mipi_pwr>;reset-gpios = <&gpio3 26 GPIO_ACTIVE_LOW>;powerdown-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;port {ov5640_to_mipi_csi2: endpoint {remote-endpoint = <&mipi_csi2_in>;clock-lanes = <0>;data-lanes = <1 2>;};};- };
- pcf8575: gpio@20 {
pinctrl-names = "default";pinctrl-0 = <&pinctrl_pcf8574>;compatible = "nxp,pcf8575";reg = <0x20>;interrupt-parent = <&gpio6>;interrupts = <31 IRQ_TYPE_EDGE_FALLING>;gpio-controller;#gpio-cells = <2>;interrupt-controller;#interrupt-cells = <2>;lines-initial-states = <0x0710>;wakeup-source;- };
+};
+&mipi_csi {
- status = "okay";
- port@0 {
reg = <0>;mipi_csi2_in: endpoint {remote-endpoint = <&ov5640_to_mipi_csi2>;clock-lanes = <0>;data-lanes = <1 2>;};- };
+};
+&pcie {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pcie>;
- reset-gpio = <&gpio1 9 GPIO_ACTIVE_LOW>;
- status = "okay";
- vpcie-supply = <®_pcie>;
- /* fsl,max-link-speed = <2>; */
+};
+&ssi2 {
- status = "okay";
+};
+&iomuxc {
- pinctrl_audmux: audmuxgrp {
fsl,pins = <MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0>;- };
- pinctrl_i2c1: i2c1 {
fsl,pins = <MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1>;- };
- pinctrl_enet_pwr: enet_pwr {
fsl,pins = <MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0>;- };
- pinctrl_mipi_pwr: pwr_mipi {
fsl,pins = <MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b0b1>;- };
- pinctrl_ov5640: ov5640grp {
fsl,pins = <MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b1MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b1>;- };
- pinctrl_reg_hdmi: reg_hdmi {
fsl,pins = <MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0>;- };
- pinctrl_uart3: uart3grp {
fsl,pins = <MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1>;- };
- pinctrl_usbotg: usbotggrp {
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0xd17059MX6QDL_PAD_KEY_ROW4__USB_OTG_PWR 0x130b0>;- };
- pinctrl_ecspi1: ecspi1grp {
fsl,pins = <MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0 0x100b1>;- };
- pinctrl_usdhc2: usdhc2grp {
fsl,pins = <MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17069MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10069MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17069MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17069MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17069MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17069>;- };
- pinctrl_usdhc2_100mhz: h100-usdhc2-100mhz {
fsl,pins = <MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9>;- };
- pinctrl_usdhc2_200mhz: h100-usdhc2-200mhz {
fsl,pins = <MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9>;- };
- pinctrl_enet: enetgrp {
fsl,pins = <MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 /* ENET_INT */MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x1b0b0 /* ETHR_nRST */>;- };
- pinctrl_reg_audio: audio-reg {
fsl,pins = <MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0>;- };
- pinctrl_pcie: pcie {
fsl,pins = <MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0>;- };
- pinctrl_pcie_reg: pciereggrp {
fsl,pins = <MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0>;- };
- pinctrl_pcf8574: pcf8575-pins {
fsl,pins = <MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0>;- };
- pinctrl_lcd: lcdgrp {
fsl,pins = <MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 /* R_LCD_DCLK */MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x100b0 /* R_LCD_PANEL_PWR */MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 /* R_LCD_HSYNC */MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 /* R_LCD_VSYNC */MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x10 /* R_LCD_MDISP */MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10>;- };
- pinctrl_pwm3: pwm3grp {
fsl,pins = <MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1>;- };
- pinctrl_reg_uart3: uart3reg {
fsl,pins = <MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0>;- };
- pinctrl_reg_3v3: reg-3v3 {
fsl,pins = <MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b0>;- };
- pinctrl_reg_1v8: reg-1v8 {
fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0>;- };
- pinctrl_led0: led0 {
fsl,pins = <MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0>;- };
+}; diff --git a/arch/arm/dts/imx6qdl-logicpd.dtsi b/arch/arm/dts/imx6-logicpd-som.dtsi similarity index 52% rename from arch/arm/dts/imx6qdl-logicpd.dtsi rename to arch/arm/dts/imx6-logicpd-som.dtsi index db1a63dcde..3fc50babf0 100644 --- a/arch/arm/dts/imx6qdl-logicpd.dtsi +++ b/arch/arm/dts/imx6-logicpd-som.dtsi @@ -1,5 +1,5 @@ /*
- Copyright 2016 Logic PD
- Copyright 2018 Logic PD
- This file is adapted from imx6qdl-sabresd.dtsi.
- Copyright 2012 Freescale Semiconductor, Inc.
- Copyright 2011 Linaro Ltd.
@@ -14,7 +14,6 @@
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> -#include "imx6q.dtsi"
/ { chosen { @@ -24,6 +23,16 @@ memory { reg = <0x10000000 0x80000000>; };
- reg_wl18xx_vmmc: regulator-wl18xx {
compatible = "regulator-fixed";regulator-name = "vwl1837";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;gpio = <&gpio7 0 GPIO_ACTIVE_HIGH>;startup-delay-us = <70000>;enable-active-high;- };
};
/* Reroute power feeding the CPU to come from the external PMIC */ @@ -44,6 +53,13 @@ <&clks IMX6QDL_CLK_PLL3_USB_OTG>; };
+&gpmi {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_gpmi_nand>;
- status = "okay";
- nand-on-flash-bbt;
+};
&i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; @@ -78,7 +94,7 @@ regulator-max-microvolt = <3300000>; regulator-name = "gen_3v3"; regulator-boot-on;
regulator-always-on;
/* regulator-always-on; */ }; sw3a_reg: sw3a {@@ -98,12 +114,11 @@ };
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-name = "gen_rgmii"; };
swbst_reg: swbst { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5150000>;@@ -161,9 +176,33 @@ regulator-max-microvolt = <2500000>; regulator-always-on; };
coin_reg: coin {regulator-min-microvolt = <2500000>;regulator-max-microvolt = <3000000>;regulator-always-on;};}; };
temp_sense0: tmp102@4a {
compatible = "ti,tmp102";reg = <0x4a>;pinctrl-names = "default";pinctrl-0 = <&pinctrl_tempsense>;interrupt-parent = <&gpio6>;interrupts = <15 IRQ_TYPE_LEVEL_LOW>;#thermal-sensor-cells = <1>;};
temp_sense1: tmp102@49 {
compatible = "ti,tmp102";reg = <0x49>;interrupt-parent = <&gpio6>;interrupts = <15 IRQ_TYPE_LEVEL_LOW>;#thermal-sensor-cells = <1>;};
mfg_eeprom: at24@51 { compatible = "atmel,24c64"; pagesize = <32>;
@@ -184,91 +223,46 @@
pinctrl_hog: hoggrp { fsl,pins = <
MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x1b0b0
MX6QDL_PAD_CSI0_MCLK__ARM_TRACE_CTL 0x1b0b0MX6QDL_PAD_CSI0_PIXCLK__ARM_EVENTO 0x1b0b0MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x1b0b0 MX6QDL_PAD_CSI0_DATA_EN__ARM_TRACE_CLK 0x1b0b0
MX6QDL_PAD_CSI0_VSYNC__ARM_TRACE00 0x1b0b0MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x1b0b0MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x1b0b0MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x1b0b0MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x1b0b0MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x1b0b0MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x1b0b0MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x1b0b0MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x1b0b0MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x1b0b0MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x1b0b0MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x1b0b0MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x1b0b0MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x1b0b0MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x1b0b0MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x1b0b0MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x1b0b0MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x80000000MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x80000000MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x80000000MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x80000000MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x80000000MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x80000000MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x80000000MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000MX6QDL_PAD_EIM_DA0__GPIO3_IO00 0x80000000MX6QDL_PAD_EIM_DA1__GPIO3_IO01 0x80000000MX6QDL_PAD_EIM_DA2__GPIO3_IO02 0x80000000MX6QDL_PAD_EIM_DA3__GPIO3_IO03 0x80000000MX6QDL_PAD_EIM_DA4__GPIO3_IO04 0x80000000MX6QDL_PAD_EIM_DA5__GPIO3_IO05 0x80000000MX6QDL_PAD_EIM_DA6__GPIO3_IO06 0x80000000MX6QDL_PAD_EIM_DA7__GPIO3_IO07 0x80000000MX6QDL_PAD_EIM_DA8__GPIO3_IO08 0x80000000MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000MX6QDL_PAD_EIM_DA10__GPIO3_IO10 0x80000000MX6QDL_PAD_EIM_DA11__GPIO3_IO11 0x80000000MX6QDL_PAD_EIM_DA12__GPIO3_IO12 0x80000000MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x80000000MX6QDL_PAD_EIM_DA14__GPIO3_IO14 0x80000000MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x80000000MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x80000000MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x80000000MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x80000000MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x80000000MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x80000000MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x80000000MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x80000000MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x80000000MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x80000000MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000MX6QDL_PAD_RGMII_TD0__GPIO6_IO20 0x80000000MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x80000000MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x80000000MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x80000000MX6QDL_PAD_RGMII_RD0__GPIO6_IO25 0x80000000MX6QDL_PAD_RGMII_RD1__GPIO6_IO27 0x80000000MX6QDL_PAD_RGMII_RD2__GPIO6_IO28 0x80000000MX6QDL_PAD_RGMII_RD3__GPIO6_IO29 0x80000000MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x80000000MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000
MX6QDL_PAD_CSI0_DAT4__ARM_TRACE01 0x1b0b0MX6QDL_PAD_CSI0_DAT5__ARM_TRACE02 0x1b0b0MX6QDL_PAD_CSI0_DAT6__ARM_TRACE03 0x1b0b0MX6QDL_PAD_CSI0_DAT7__ARM_TRACE04 0x1b0b0MX6QDL_PAD_CSI0_DAT8__ARM_TRACE05 0x1b0b0MX6QDL_PAD_CSI0_DAT9__ARM_TRACE06 0x1b0b0MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x1b0b0MX6QDL_PAD_CSI0_DAT11__ARM_TRACE08 0x1b0b0MX6QDL_PAD_CSI0_DAT12__ARM_TRACE09 0x1b0b0MX6QDL_PAD_CSI0_DAT13__ARM_TRACE10 0x1b0b0MX6QDL_PAD_CSI0_DAT14__ARM_TRACE11 0x1b0b0MX6QDL_PAD_CSI0_DAT15__ARM_TRACE12 0x1b0b0MX6QDL_PAD_CSI0_DAT16__ARM_TRACE13 0x1b0b0MX6QDL_PAD_CSI0_DAT17__ARM_TRACE14 0x1b0b0MX6QDL_PAD_CSI0_DAT18__ARM_TRACE15 0x1b0b0MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0>;- };
- pinctrl_gpmi_nand: gpminandgrp {
fsl,pins = <MX6QDL_PAD_NANDF_CLE__NAND_CLE 0x0b0b1MX6QDL_PAD_NANDF_ALE__NAND_ALE 0x0b0b1MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0x0b0b1MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0x0b000MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0x0b0b1MX6QDL_PAD_SD4_CMD__NAND_RE_B 0x0b0b1MX6QDL_PAD_SD4_CLK__NAND_WE_B 0x0b0b1MX6QDL_PAD_NANDF_D0__NAND_DATA00 0x0b0b1MX6QDL_PAD_NANDF_D1__NAND_DATA01 0x0b0b1MX6QDL_PAD_NANDF_D2__NAND_DATA02 0x0b0b1MX6QDL_PAD_NANDF_D3__NAND_DATA03 0x0b0b1MX6QDL_PAD_NANDF_D4__NAND_DATA04 0x0b0b1MX6QDL_PAD_NANDF_D5__NAND_DATA05 0x0b0b1MX6QDL_PAD_NANDF_D6__NAND_DATA06 0x0b0b1MX6QDL_PAD_NANDF_D7__NAND_DATA07 0x0b0b1;};@@ -288,6 +282,7 @@
pinctrl_uart2: uart2grp { fsl,pins = <
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x13059 /* BT_EN */ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1@@ -297,30 +292,39 @@
pinctrl_usdhc1: usdhc1grp { fsl,pins = <
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170B9MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100B9MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170B9MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170B9MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170B9MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170B9;
};
pinctrl_usdhc3: usdhc3grp { fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WL_IRQ */MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1f0b0 /* WLAN_EN */MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1f0b0 /* BT_EN */
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17049MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10049MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17049MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17049MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17049MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17049MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x130b0 /* WL_IRQ */MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* WLAN_EN */>;- };
- pinctrl_tempsense: tempsensegrp {
fsl,pins = <MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 /* Temp Sense Alert */;};};
+&snvs_poweroff {
- status = "okay";
+};
&uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; @@ -331,31 +335,39 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay";
- uart-has-rtscts;
- bluetooth {
compatible = "ti,wl1837-st";enable-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;- };
};
&usdhc1 {
- pinctrl-names = "default";
- pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>;
- cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
- non-removable; keep-power-in-suspend; enable-sdio-wakeup; status = "okay";
- vmmc-supply = <&sw2_reg>;
};
&usdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; non-removable;
- cap-power-off-card; keep-power-in-suspend;
- enable-sdio-wakeup;
- vmmc-supply = <&sw2_reg>;
- wakeup-source;
- vmmc-supply = <®_wl18xx_vmmc>; status = "okay"; #address-cells = <1>; #size-cells = <0>;
- wlcore: wlcore@0 {
- wlcore: wlcore@2 { compatible = "ti,wl1837"; reg = <2>; interrupt-parent = <&gpio7>;
interrupts = <1 GPIO_ACTIVE_HIGH>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;tcxo-clock-frequency = <26000000>;}; diff --git a/arch/arm/dts/imx6q-logicpd.dts b/arch/arm/dts/imx6q-logicpd.dts index d1e7a389d0..dcea784477 100644 --- a/arch/arm/dts/imx6q-logicpd.dts +++ b/arch/arm/dts/imx6q-logicpd.dts @@ -1,5 +1,5 @@ /*
- Copyright 2017 Logic PD, Inc.
- Copyright 2018 Logic PD, Inc.
- Based on SabreSD, Copyright 2016 Freescale Semiconductor, Inc.
- This file is dual-licensed: you can use it either under the terms
@@ -42,149 +42,137 @@ */
/dts-v1/;
-#include "imx6qdl-logicpd.dtsi" +#include "imx6q.dtsi" +#include "imx6-logicpd-som.dtsi" +#include "imx6-logicpd-baseboard.dtsi"
/ {
- model = "Logic PD i.MX6QDL SOM";
- model = "Logic PD i.MX6QD SOM-M3 (HDMI)"; compatible = "fsl,imx6q";
- reg_usb_otg_vbus: regulator-otg-vbus@0 {
compatible = "regulator-fixed";regulator-name = "usb_otg_vbus";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;enable-active-high;
- backlight: backlight_lvds {
compatible = "pwm-backlight";pwms = <&pwm3 0 20000>;brightness-levels = <0 4 8 16 32 64 128 255>;default-brightness-level = <6>;power-supply = <®_lcd>;
- reg_usb_h1_vbus: regulator-usbh1vbus@1 {
- reg_lcd: regulator-lcd {
pinctrl-names = "default";pinctrl-0 = <&pinctrl_lcd_reg>;
regulator-name = "usb_h1_vbus";regulator-min-microvolt = <5000000>;regulator-max-microvolt = <5000000>;
regulator-name = "lcd_panel_pwr";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;gpio = <&gpio4 17 GPIO_ACTIVE_HIGH>;
gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
vin-supply = <®_3v3>;startup-delay-us = <500000>;
- reg_3v3: regulator-3v3@2 {
- lcd_reset: lcd_reset {
pinctrl-names = "default";pinctrl-0 = <&pinctrl_lcd_reset>;
regulator-name = "reg_3v3";
regulator-name = "nLCD_RESET";gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;enable-active-high;regulator-always-on;vin-supply = <®_lcd>;- };
- panel-lvds0 {
compatible = "ampire,am800480b3tmqw";backlight = <&backlight>;port {panel_in_lvds0: endpoint {remote-endpoint = <&lvds0_out>;};};};
-&uart3 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart3>;
+&hdmi {
- ddc-i2c-bus = <&i2c3>; status = "okay";
};
-&usbh1 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh1>;
- vbus-supply = <®_usb_h1_vbus>;
- status = "okay";
+&i2c1 {
- ili_touch: ilitouch@26 {
compatible = "ili,ili2117a";reg = <0x26>;pinctrl-names = "default";pinctrl-0 = <&pinctrl_touchscreen>;interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_RISING>;ili2117a,poll-period = <10>;ili2117a,max-touch = <2>;- };
};
-&usbh2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh2>;
- phy_type = "hsic";
- disable-over-current;
- status = "okay";
+®_hdmi {
- regulator-always-on;
};
-&usbotg {
- vbus-supply = <®_usb_otg_vbus>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbotg>;
- disable-over-current;
+&ldb { status = "okay";
- lvds-channel@0 {
fsl,data-mapping = "spwg";fsl,data-width = <24>;status = "okay";port@4 {reg = <4>;lvds0_out: endpoint {remote-endpoint = <&panel_in_lvds0>;};};- };
};
-&fec {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_enet>;
- phy-mode = "rmii";
- phy-speed = <10>;
+&clks {
- assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>,<&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,<&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>;- assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
<&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,<&clks IMX6QDL_CLK_PLL2_PFD2_396M>;+};
+&pwm3 { status = "okay"; };
&usdhc2 {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usdhc2>; cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
- no-1-8-v;
- keep-power-in-suspend;
- status = "okay";
};
&iomuxc {
- pinctrl_enet: enetgrp {
fsl,pins = <MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 /* nINT */MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0 /* Ethernet Reset */>;- };
- pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x130b0MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x130b0MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x130b0MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0>;- };
- pinctrl_uart3: uart3grp {
- pinctrl_lcd_reg: lcdreg { fsl,pins = <
MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x100b0 /* R_LCD_PANEL_PWR */;};
- pinctrl_usbh1: usbh1grp {
- pinctrl_lcd_reset: lcdreset { fsl,pins = <
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* USB_H1_PWR_EN */
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b0 /* LCD_nRESET */;};
- pinctrl_usbh2: usbh2grp {
- pinctrl_touchscreen: touchscreengrp { fsl,pins = <
MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x17030MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x13030>;- };
- pinctrl_usbotg: usbotggrp {
- fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x130b0 /* USB_OTG_PWR_EN */>;- };
- pinctrl_usdhc2: usdhc2grp {
fsl,pins = <MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x1b0b0 /* TOUCH_nPINTDAV */;};};
diff --git a/board/logicpd/imx6/MAINTAINERS b/board/logicpd/imx6/MAINTAINERS index 5db7d2cadd..20ec5918e4 100644 --- a/board/logicpd/imx6/MAINTAINERS +++ b/board/logicpd/imx6/MAINTAINERS @@ -4,3 +4,6 @@ S: Maintained F: board/logicpd/imx6/ F: include/configs/imx6_logic.h F: configs/imx6q_logic_defconfig +F: arch/arm/dts/imx6-logicpd-baseboard.dtsi +F: arch/arm/dts/imx6-logicpd-som.dtsi +F: arch/arm/dts/imx6q-logicpd.dts
Applied to u-boot-imx, master, thanks !
Best regards, Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic@denx.de
=====================================================================