Hi,
I have been trying recently to optimize the boot time on a customized board based on the IMX6DP.
For the time being, I succeeded in enabling the DDR (dual data rate) mode for the emmc to speed up the data rate for read and write cycles in u-boot.
By reading a file from the emmc using the "load" command (e.g. load mmc 2:1 0x12000000 file), I can see that the data rate has doubled, confirming that the DDR mode is enabled.
However, the problem I have is that when I execute the u-boot command "mmc dev 2" to switch the current device to the onboard eMMC, the command fails with the output below : (with DEBUG enabled)
U-Boot >mmc dev 2 blk_find_device: if_type=6, devnum=2: usdhc@02198000.blk, 6, 2 ofnode_read_u32: vmmc-supply: 0x33 (51) ofnode_read_u32: vqmmc-supply: 0x33 (51) clock is disabled (0Hz) fixed_regulator_set_enable: dev='3p3v', enable=1, delay=0, has_gpio=0 clock is enabled (400000Hz) Command failed, result=1 U-Boot >
and after this command, any attempt to interact with the emmc (e.g. fatls mmc 2:1 ) ends with failure.
To enable the DDR mode, all I did was define the macro CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE in the header of my board.
Any help is greatly appreciated !
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Abder,