On 26 April 2015 at 08:08, Bin Meng bmeng.cn@gmail.com wrote:
On Sat, Apr 25, 2015 at 11:13 PM, Gabriel Huau contact@huau-gabriel.fr wrote:
The SPI NOR on the minnowboard max is a MICRON N25Q064A
Signed-off-by: Gabriel Huau contact@huau-gabriel.fr
Changes for v2: - Update the dts to put the correct flash name
arch/x86/dts/minnowmax.dts | 2 +- include/configs/minnowmax.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts index 3936e21..dd20b2c 100644 --- a/arch/x86/dts/minnowmax.dts +++ b/arch/x86/dts/minnowmax.dts @@ -94,7 +94,7 @@ compatible = "intel,ich"; spi-flash@0 { reg = <0>;
compatible = "sst,25vf016b", "spi-flash";
compatible = "stmicro,n25q064a", "spi-flash"; memory-map = <0xff800000 0x00800000>; }; };diff --git a/include/configs/minnowmax.h b/include/configs/minnowmax.h index 3c7b266..72393fa 100644 --- a/include/configs/minnowmax.h +++ b/include/configs/minnowmax.h @@ -43,7 +43,7 @@
#define CONFIG_SCSI_DEV_LIST \ {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA} -#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_MMC
#define CONFIG_SDHCI
Reviewed-by: Bin Meng bmeng.cn@gmail.com
Acked-by: Simon Glass sjg@chromium.org