From: Chin Liang See chin.liang.see@intel.com
In current implementation, any exception would trigger a CPU reset. But a bad written SPL would cause infinite loop where the system will reload the same SPL instead of loading factory safe image.
Hence this patch is to ensure any exception will cause a hang. At this moment, watchdog shall be triggered and Remote System Update mechanism shall load the next production image or factory safe image.
Signed-off-by: Chin Liang See chin.liang.see@intel.com Signed-off-by: Chee Hong Ang chee.hong.ang@intel.com --- configs/socfpga_agilex_defconfig | 1 + configs/socfpga_stratix10_defconfig | 1 + 2 files changed, 2 insertions(+)
diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 2885c60..acf0316 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -61,3 +61,4 @@ CONFIG_DM_USB=y CONFIG_USB_DWC2=y CONFIG_USB_STORAGE=y # CONFIG_SPL_USE_TINY_PRINTF is not set +CONFIG_PANIC_HANG=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 9ae6ef6..8b4d1fb 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -67,3 +67,4 @@ CONFIG_USB_STORAGE=y CONFIG_DESIGNWARE_WATCHDOG=y CONFIG_WDT=y # CONFIG_SPL_USE_TINY_PRINTF is not set +CONFIG_PANIC_HANG=y