From: "Haijun.Zhang" haijun.zhang@freescale.com
Add platform support for p1020rdb-pd
Signed-off-by: Jerry Huang Chang-Ming.Huang@freescale.com Signed-off-by: Haijun Zhang Haijun.Zhang@freescale.com CC: Sun Yusong-R58495 yorksun@freescale.com CC: u-boot@lists.denx.de --- board/freescale/p1_p2_rdb_pc/ddr.c | 2 +- boards.cfg | 4 ++++ include/configs/p1_p2_rdb_pc.h | 19 +++++++++++++++++-- 3 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c index 9355536..262fd36 100644 --- a/board/freescale/p1_p2_rdb_pc/ddr.c +++ b/board/freescale/p1_p2_rdb_pc/ddr.c @@ -80,7 +80,7 @@ dimm_params_t ddr_raw_timing = { .refresh_rate_ps = 7800000, .tFAW_ps = 30000, }; -#elif defined(CONFIG_P1020MBG) +#elif (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD)) /* Micron MT41J512M8_187E */ dimm_params_t ddr_raw_timing = { .n_ranks = 2, diff --git a/boards.cfg b/boards.cfg index 79ee5e7..a855348 100644 --- a/boards.cfg +++ b/boards.cfg @@ -772,6 +772,10 @@ P1020RDB-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freesca P1020RDB-PC_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,SPIFLASH P1020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SDCARD P1020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SPIFLASH +P1020RDB-PD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB_PD +P1020RDB-PD_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB_PD,NAND +P1020RDB-PD_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB_PD,SDCARD +P1020RDB-PD_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB_PD,SPIFLASH P1020UTM-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM P1020UTM-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM,36BIT P1020UTM-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM,36BIT,SDCARD diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 1a8ea3a..d65c5b7 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -50,8 +50,12 @@ #define CONFIG_SYS_L2_SIZE (256 << 10) #endif
+#if (defined(CONFIG_P1020RDB) || defined(CONFIG_P1020RDB_PD)) #if defined(CONFIG_P1020RDB) #define CONFIG_BOARDNAME "P1020RDB-PC" +#elif defined(CONFIG_P1020RDB_PD) +#define CONFIG_BOARDNAME "P1020RDB-PD" +#endif #define CONFIG_NAND_FSL_ELBC #define CONFIG_P1020 #define CONFIG_SPI_FLASH @@ -278,7 +282,7 @@ #define SPD_EEPROM_ADDRESS 0x52 #undef CONFIG_FSL_DDR_INTERACTIVE
-#ifdef CONFIG_P1020MBG +#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD)) #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G #define CONFIG_CHIP_SELECTS_PER_CTRL 2 #else @@ -349,7 +353,7 @@ /* * Local Bus Definitions */ -#if defined(CONFIG_P1020MBG) +#if (defined(CONFIG_P1020MBG) || defined(CONFIG_P1020RDB_PD)) #define CONFIG_SYS_MAX_FLASH_SECT 512 /* 64M */ #define CONFIG_SYS_FLASH_BASE 0xec000000 #elif defined(CONFIG_P1020UTM) @@ -407,6 +411,16 @@ | BR_PS_8 /* Port Size = 8 bit */ \ | BR_MS_FCM /* MSEL = FCM */ \ | BR_V) /* valid */ +#if defined(CONFIG_P1020RDB_PD) +#define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_32KB \ + | OR_FCM_PGS /* Large Page*/ \ + | OR_FCM_CSCT \ + | OR_FCM_CST \ + | OR_FCM_CHT \ + | OR_FCM_SCY_1 \ + | OR_FCM_TRLX \ + | OR_FCM_EHTR) +#else #define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_32KB /* small page */ \ | OR_FCM_CSCT \ | OR_FCM_CST \ @@ -414,6 +428,7 @@ | OR_FCM_SCY_1 \ | OR_FCM_TRLX \ | OR_FCM_EHTR) +#endif #endif /* CONFIG_NAND_FSL_ELBC */
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */