All those functions removed with this patch are not accessed at all. So lets remove them.
Signed-off-by: Stefan Roese sr@denx.de ---
Changes in v3: None Changes in v2: None
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 55 ----------------------------------- 1 file changed, 55 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c index ea835fc..9e412bb 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c +++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c @@ -9,14 +9,11 @@ #include <common.h> #include <netdev.h> #include <asm/cache.h> -#include <u-boot/md5.h> #include <asm/io.h> #include <asm/arch/cpu.h> #include <asm/arch/soc.h> #include <mvebu_mmc.h>
-#define BUFLEN 16 - void reset_cpu(unsigned long ignored) { struct kwcpu_registers *cpureg = @@ -30,31 +27,6 @@ void reset_cpu(unsigned long ignored) }
/* - * Generates Ramdom hex number reading some time varient system registers - * and using md5 algorithm - */ -unsigned char get_random_hex(void) -{ - int i; - u32 inbuf[BUFLEN]; - u8 outbuf[BUFLEN]; - - /* - * in case of 88F6281/88F6282/88F6192 A0, - * Bit7 need to reset to generate random values in KW_REG_UNDOC_0x1470 - * Soc reg offsets KW_REG_UNDOC_0x1470 and KW_REG_UNDOC_0x1478 are - * reserved regs and does not have names at this moment - * (no errata available) - */ - writel(readl(KW_REG_UNDOC_0x1478) & ~(1 << 7), KW_REG_UNDOC_0x1478); - for (i = 0; i < BUFLEN; i++) { - inbuf[i] = readl(KW_REG_UNDOC_0x1470); - } - md5((u8 *) inbuf, (BUFLEN * sizeof(u32)), outbuf); - return outbuf[outbuf[7] % 0x0f]; -} - -/* * Window Size * Used with the Base register to set the address window size and location. * Must be programmed from LSB to MSB as sequence of ones followed by @@ -140,33 +112,6 @@ int kw_config_adr_windows(void) }
/* - * kw_config_mpp - Multi-Purpose Pins Functionality configuration - * - * Each MPP can be configured to different functionality through - * MPP control register, ref (sec 6.1 of kirkwood h/w specification) - * - * There are maximum 64 Multi-Pourpose Pins on Kirkwood - * Each MPP functionality can be configuration by a 4bit value - * of MPP control reg, the value and associated functionality depends - * upon used SoC varient - */ -int kw_config_mpp(u32 mpp0_7, u32 mpp8_15, u32 mpp16_23, u32 mpp24_31, - u32 mpp32_39, u32 mpp40_47, u32 mpp48_55) -{ - u32 *mppreg = (u32 *) KW_MPP_BASE; - - /* program mpp registers */ - writel(mpp0_7, &mppreg[0]); - writel(mpp8_15, &mppreg[1]); - writel(mpp16_23, &mppreg[2]); - writel(mpp24_31, &mppreg[3]); - writel(mpp32_39, &mppreg[4]); - writel(mpp40_47, &mppreg[5]); - writel(mpp48_55, &mppreg[6]); - return 0; -} - -/* * SYSRSTn Duration Counter Support * * Kirkwood SoC implements a hardware-based SYSRSTn duration counter.