PCIe TLB should be created with CONFIG_PCI defined
Signed-off-by: Prabhakar Kushwaha prabhakar@freescale.com --- Based upon git://git.denx.de/u-boot.git branch master This patch depends upon following patch set 1) powerpc/mpc85xx:No NOR boot, do not compile IFC errata A003399 http://patchwork.ozlabs.org/patch/236849/ 2) powerpc/mpc85xx: new SPL support for IFC NAND http://patchwork.ozlabs.org/patch/236850/ 3) board/p1010rdb:Add NAND boot support using new SPL format http://patchwork.ozlabs.org/patch/236851/ 4) board/bsc9131rdb:Add NAND boot support using new SPL format http://patchwork.ozlabs.org/patch/236852/ 5) board/bsc9132qds:Add NAND boot support using new SPL format http://patchwork.ozlabs.org/patch/236853/
board/freescale/p1010rdb/tlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/p1010rdb/tlb.c b/board/freescale/p1010rdb/tlb.c index 7a8690a..bf9ed3c 100644 --- a/board/freescale/p1010rdb/tlb.c +++ b/board/freescale/p1010rdb/tlb.c @@ -64,7 +64,7 @@ struct fsl_e_tlb_entry tlb_table[] = { 0, 3, BOOKE_PAGESZ_16M, 1), #endif
-#ifndef CONFIG_PCI +#ifdef CONFIG_PCI /* *I*G* - PCI */ SET_TLB_ENTRY(1, CONFIG_SYS_PCIE1_MEM_VIRT, CONFIG_SYS_PCIE1_MEM_PHYS, MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,