-----Original Message----- From: U-Boot [mailto:u-boot-bounces@lists.denx.de] On Behalf Of Heiko Schocher Sent: 2016年8月17日 15:13 To: U-Boot Mailing List u-boot@lists.denx.de Cc: Bo Shen voice.shen@atmel.com Subject: [U-Boot] [PATCH 2/6] ARM: at91: clock: correct PRES offset for at91sam9x5
on at91sam9x5 PRES offset is 4 in the PMC master clock register.
Signed-off-by: Heiko Schocher hs@denx.de
Acked-by: Wenyou Yang wenyou.yang@atmel.com
arch/arm/mach-at91/arm926ejs/clock.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-at91/arm926ejs/clock.c b/arch/arm/mach- at91/arm926ejs/clock.c index c8d24ae..e3181fa 100644 --- a/arch/arm/mach-at91/arm926ejs/clock.c +++ b/arch/arm/mach-at91/arm926ejs/clock.c @@ -162,7 +162,13 @@ int at91_clock_init(unsigned long main_clock) gd->arch.mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK); freq = gd->arch.mck_rate_hz;
+#if defined(CONFIG_AT91SAM9X5)
- /* different in prescale on at91sam9x5 */
- freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 4)); #else freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /*
prescale */ +#endif
#if defined(CONFIG_AT91SAM9G20) /* mdiv ; (x >> 7) = ((x >> 8) * 2) */ gd->arch.mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ? -- 2.5.5
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