replace all occurences of CONFIG_L2_OFF with a more appropriate CONFIG_SYS_NO_L2CACHE
CONFIG_SYS_NO_L2CACHE has been chosen to be in line with CONFIG_SYS_NO_ICACHE and CONFIG_SYS_NO_DCACHE
Signed-off-by: Aneesh V aneesh@ti.com --- arch/arm/cpu/armv7/cpu.c | 6 +----- include/configs/ca9x4_ct_vxp.h | 2 +- include/configs/efikamx.h | 2 +- include/configs/mx51evk.h | 2 +- include/configs/mx53evk.h | 2 +- include/configs/omap4_panda.h | 2 +- include/configs/omap4_sdp4430.h | 2 +- include/configs/s5pc210_universal.h | 2 +- include/configs/tegra2-common.h | 2 +- include/configs/vision2.h | 2 +- 10 files changed, 10 insertions(+), 14 deletions(-)
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c index a01e0d6..7f28d87 100644 --- a/arch/arm/cpu/armv7/cpu.c +++ b/arch/arm/cpu/armv7/cpu.c @@ -35,11 +35,7 @@ #include <command.h> #include <asm/system.h> #include <asm/cache.h> -#ifndef CONFIG_L2_OFF -#include <asm/arch/sys_proto.h> -#endif - -static void cache_flush(void); +#include <asm/armv7.h>
int cleanup_before_linux(void) { diff --git a/include/configs/ca9x4_ct_vxp.h b/include/configs/ca9x4_ct_vxp.h index 63f003d..bdd4e91 100644 --- a/include/configs/ca9x4_ct_vxp.h +++ b/include/configs/ca9x4_ct_vxp.h @@ -40,7 +40,7 @@
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_L2_OFF 1 +#define CONFIG_SYS_NO_L2CACHE 1 #define CONFIG_INITRD_TAG 1
/* Size of malloc() pool */ diff --git a/include/configs/efikamx.h b/include/configs/efikamx.h index 1424347..0b64f54 100644 --- a/include/configs/efikamx.h +++ b/include/configs/efikamx.h @@ -38,7 +38,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_L2_OFF +#define CONFIG_SYS_NO_L2CACHE
/* * Bootloader Components Configuration diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 591d6e1..20c299b 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -33,7 +33,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_L2_OFF +#define CONFIG_SYS_NO_L2CACHE
#include <asm/arch/imx-regs.h> /* diff --git a/include/configs/mx53evk.h b/include/configs/mx53evk.h index f2a5752..244a1ae 100644 --- a/include/configs/mx53evk.h +++ b/include/configs/mx53evk.h @@ -29,7 +29,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO
-#define CONFIG_L2_OFF +#define CONFIG_SYS_NO_L2CACHE
#include <asm/arch/imx-regs.h>
diff --git a/include/configs/omap4_panda.h b/include/configs/omap4_panda.h index 2b03b0f..8684798 100644 --- a/include/configs/omap4_panda.h +++ b/include/configs/omap4_panda.h @@ -46,7 +46,7 @@ #define CONFIG_DISPLAY_BOARDINFO 1
/* Keep L2 Cache Disabled */ -#define CONFIG_L2_OFF 1 +#define CONFIG_SYS_NO_L2CACHE 1
/* Clock Defines */ #define V_OSCK 38400000 /* Clock output from T2 */ diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index 9a8bb73..7cc0c13 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -47,7 +47,7 @@ #define CONFIG_DISPLAY_BOARDINFO 1
/* Keep L2 Cache Disabled */ -#define CONFIG_L2_OFF 1 +#define CONFIG_SYS_NO_L2CACHE 1
/* Clock Defines */ #define V_OSCK 38400000 /* Clock output from T2 */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index c033a8d..09f5cfc 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -43,7 +43,7 @@ #define CONFIG_DISPLAY_BOARDINFO
/* Keep L2 Cache Disabled */ -#define CONFIG_L2_OFF 1 +#define CONFIG_SYS_NO_L2CACHE 1
#define CONFIG_SYS_SDRAM_BASE 0x40000000 #define CONFIG_SYS_TEXT_BASE 0x44800000 diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h index 4f4374a..27edf68 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra2-common.h @@ -31,7 +31,7 @@ #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ #define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */ #define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */ -#define CONFIG_L2_OFF /* No L2 cache */ +#define CONFIG_SYS_NO_L2CACHE /* No L2 cache */
#include <asm/arch/tegra2.h> /* get chip and board defs */
diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 4c8e7fa..d6c99de 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -26,7 +26,7 @@
#define CONFIG_MX51 /* in a mx51 */ -#define CONFIG_L2_OFF +#define CONFIG_SYS_NO_L2CACHE
#include <asm/arch/imx-regs.h>