Subject: RE: [PATCH] imx: imx8m: drop uneeded check
Hello Peng,
-----Original Message----- From: U-Boot u-boot-bounces@lists.denx.de On Behalf Of Peng Fan (OSS) Sent: Friday, April 29, 2022 10:19 AM To: sbabic@denx.de; festevam@gmail.com; NXP i.MX U-Boot Team uboot-imx@nxp.com Cc: u-boot@lists.denx.de; Peng Fan peng.fan@nxp.com Subject: [PATCH] imx: imx8m: drop uneeded check
From: Peng Fan peng.fan@nxp.com
All i.MX8M needs TZASC ID SWAP set and locked, no need the check to waste cpu cycles.
Signed-off-by: Peng Fan peng.fan@nxp.com
arch/arm/mach-imx/imx8m/soc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 8e23e6da326..5240dc11363
100644
--- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -72,15 +72,13 @@ void enable_tzc380(void) * According to TRM, TZASC_ID_SWAP_BYPASS should be set in * order to avoid AXI Bus errors when GPU is in use */
- if (is_imx8mq() || is_imx8mm() || is_imx8mn() || is_imx8mp())
setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
- setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS);
Since you've dropped the SoC-specific check, perhaps you can combine bits set that are done by setbits_le32 together with one below?
Let’s separate them, first set, then lock.
/* * imx8mn and imx8mp implements the lock bit for * TZASC_ID_SWAP_BYPASS, enable it to lock settings */
- if (is_imx8mn() || is_imx8mp())
setbits_le32(&gpr->gpr[10],GPR_TZASC_ID_SWAP_BYPASS_LOCK);
- setbits_le32(&gpr->gpr[10], GPR_TZASC_ID_SWAP_BYPASS_LOCK);
BYPASS_LOCK is not present in i.MX8MM TRM, but I guess you've checked that it is implemented already, right?
Yes. It is implemented. RM needs update.
Regards, Peng.
/* * set Region 0 attribute to allow secure and non-secure -- 2.36.0
-- andrey