Hi Joe,
On Wed, Jan 28, 2015 at 5:42 PM, Joe Hershberger joe.hershberger@gmail.com wrote:
On Tue, Jan 27, 2015 at 9:24 PM, Sonic Zhang sonic.adi@gmail.com wrote:
Hi Joe,
On Wed, Jan 28, 2015 at 4:43 AM, Joe Hershberger joe.hershberger@gmail.com wrote:
On Mon, Jan 26, 2015 at 8:54 PM, sonic.adi@gmail.com wrote:
From: Sonic Zhang sonic.zhang@analog.com
Board can define its own AXI burst length to improve DWMAC DMA performance.
Signed-off-by: Sonic Zhang sonic.zhang@analog.com
drivers/net/designware.c | 2 ++ drivers/net/designware.h | 5 +++++ 2 files changed, 7 insertions(+)
diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 9ded895..d8d6792 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -256,6 +256,8 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis)
writel(readl(&dma_p->opmode) | RXSTART | TXSTART,&dma_p->opmode);
This should probably include: +#if CONFIG_DW_AXI_BURST_LEN so that this register is only accessed if configured.
CONFIG_DW_AXI_BURST_LEN is always defined in designware.h in the same patch.
+/* Default AXI BUS Burst length */ +#ifndef CONFIG_DW_AXI_BURST_LEN +#define CONFIG_DW_AXI_BURST_LEN 0 +#endif
Yes, I saw that... sorry I wasn't clear. I meant don't we want to avoid the write (preserving existing behavior) instead of ensuring that it is set, and still adding a register write that is (presumably) a NOP?
OK, I will update the patch.
Sonic