On 10/14/2017 11:51 PM, Marek Vasut wrote:
On 10/02/2017 11:15 AM, Jean-Jacques Hiblot wrote:
On 22/09/2017 16:42, Jaehoon Chung wrote:
Dear JJ,
On 09/21/2017 11:29 PM, Jean-Jacques Hiblot wrote:
This series brings support for HS200 and UHS modes to the mmc core. It has been tested with the hsmmc driver on several platforms (DRA7, AM57x, AM437x, beaglebone black, Atmel SAMA5D3 xplained). Some modifications are required in the host driver to take advantage of this (voltage switching, tuning). The changes to the host driver will be posted a another series as this one is already long enough.
The series starts with a small refactoring of th sd/mmc startup. The first 5 commits are mostly moving code around with little or no functionnal change.
Then the notion of "mode" is introduced. Until now, this information wasn't kept in struct mmc. Only the clock and a flag for ddr was kept. Later the mode information will be used to select the clock frequency, the ddr flag and the tuning procedure. It will be also be check against the host capabilities.
Then comes the big refactoring job in: "mmc: refactor MMC startup to make it easier to support new modes" and "mmc: refactor SD startup to make it easier to support new modes" Since the number of modes is increasing, it makes sense to try them in a more organized way. those commits use a list of supported modes and iterate through them to find the best working one. It also allows to switch more easilly from one mode to another (switching from HS200 to DDR52 to access boot partitions for example)
Then there are a couple of new callback added to:
- send the initialization stream (74 clock cycles)
- wait while the card is busy (used during UHS voltage switching).
checking is done on dat0.
- select the IO voltage
Then Power cycle is added. Without power cycle, if a UHS card fails to enumerate in UHS mode, it can't fall back to high speed mode and card enumeration will fail. Also in case of a reset (as opposed to a power on), it ensures that the SDCard is in clean state before re-doing the initialization.
And finally the last commits add the support for HS200 and UHS.
With this in place and the required changes in the HSMMC host driver (including DMA), we observe significant improvements in the performances on a DRA72 evm: eMMC HS200: 124 MB/s eMMC DDR52: 78 MB/s sd SDR104: 71 MB/s sd SDR50: 44 MB/s
I have one question.
Did you test about accessing Boot partition of eMMC?
As i know, boot partition doesn't support the HS200 mode.
When i checked your patches, there is no the function of mode changing for accessing boot partition. If i missed it, let me know, plz.
Yes I did test the boot partitions. HS200 is not used in this case. The key function is mmc_boot_part_access_chk(). It checks if the current mode is supported by the partition. If not, it'll reselect a new mode.
Is anything new happening on the HS200 front ?
Will apply this patchset. Thanks!
Best Regards, Jaehoon Chung