If SPL is used we want to use the generic SPL framework and boot from SPI via a board-specific means. Add these options to the board config file.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
configs/chromebook_link_defconfig | 23 ++++++++++++++++++++++- include/configs/chromebook_link.h | 9 +++++++++ 2 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/configs/chromebook_link_defconfig b/configs/chromebook_link_defconfig index 782123b..ebaec30 100644 --- a/configs/chromebook_link_defconfig +++ b/configs/chromebook_link_defconfig @@ -1,5 +1,13 @@ CONFIG_X86=y -CONFIG_SYS_MALLOC_F_LEN=0x1800 +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_VIDEO=y CONFIG_VENDOR_GOOGLE=y CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" CONFIG_TARGET_CHROMEBOOK_LINK=y @@ -8,9 +16,17 @@ CONFIG_HAVE_MRC=y CONFIG_SMP=y CONFIG_HAVE_VGA_BIOS=y CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_CPU_SUPPORT=y +CONFIG_SPL_NET_SUPPORT=y +CONFIG_SPL_PCI_SUPPORT=y +CONFIG_SPL_PCH_SUPPORT=y +CONFIG_SPL_RTC_SUPPORT=y +CONFIG_SPL_TIMER_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_CPU=y # CONFIG_CMD_IMLS is not set @@ -33,8 +49,12 @@ CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_DM=y CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y CONFIG_CPU=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_INTEL=y @@ -58,6 +78,7 @@ CONFIG_USB=y CONFIG_DM_USB=y CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y +CONFIG_VIDEO_IVYBRIDGE_IGD=y CONFIG_USB_KEYBOARD=y CONFIG_VIDEO_VESA=y CONFIG_FRAMEBUFFER_SET_VESA_MODE=y diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index f2d798a..b116a27 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -19,4 +19,13 @@ #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0x003f8000
+#define CONFIG_SPL_FRAMEWORK + +#define CONFIG_SPL_TEXT_BASE 0xfffd0000 + +#define BOOT_DEVICE_SPI 10 + +#define CONFIG_SPL_BOARD_LOAD_IMAGE +#define BOOT_DEVICE_BOARD 11 + #endif /* __CONFIG_H */