Re: [U-Boot] [PATCH] dm: core: Round up size when allocating so that it is cache line aligned

Hi Bin,

On Tuesday 19 September 2017 05:42 PM, Bin Meng wrote:

Hi Faiz,

On Tue, Sep 19, 2017 at 7:23 PM, Faiz Abbas faiz_abbas@ti.com wrote:

...

The size variable may not be always be a mulitple of ARCH_DMA_MINALIGN and using it to flush cache leads to cache misaligned warnings.

Therefore, round up the size to a multiple of ARCH_DMA_MINLAIGN when allocating private data.

Signed-off-by: Faiz Abbas faiz_abbas@ti.com

drivers/core/device.c | 1 + 1 file changed, 1 insertion(+)

Isn't DM_FLAG_ALLOC_PRIV_DMA sufficient?

The check_cache_range function checks both the beginning and the end of the range given to it for cache alignment. DM_FLAG_ALLOC_PRIV_DMA aligns only the base address but the end address decided by size need not be at a multiple of ARCH_DMA_MINALIGN.

Thanks, Faiz