Re: [U-Boot] [PATCH v2] armv8/ls2080ardb: Update DDR timing to support more UDIMMs

27 May 2016


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-----Original Message-----
From: York Sun [mailto:york.sun@nxp.com]
Sent: Thursday, May 19, 2016 4:28 AM
To: Shengzhou Liu shengzhou.liu@nxp.com; u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH v2] armv8/ls2080ardb: Update DDR timing to
support more UDIMMs
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Shengzhou,
I am still seeing it unstable on ls2085rdb-5 (ATX boardfarm) at 1866MT/s. It
can boot if I change clk_adjust to 5. Please work with hardware team to
confirm.
York
York
On LS1046RDB, the clk_adj is 9, an odd instead of even data, so we have to update it, and there will be more new boards in future.
Shengzhou