пт, 3 лют. 2023 р. о 04:16 Simon Glass sjg@chromium.org пише:
Hi Svyatoslav,
On Thu, 2 Feb 2023 at 11:43, Svyatoslav Ryhel clamor95@gmail.com wrote:
This implementation allows pwr i2c writing on early stages when DM was not yet setup.
s/was/is/ ?
Greetings!
is
Such writing is needed to configure main voltages of PMIC.
Is this in SPL?
Yes, this is an early SPL stage, when i2c DM is not yet set, and u-boot to be able to boot itself has to set PMIC core and cpu voltages. This is the case for T30 and T124, though it may not be exclusive
Best regards, Svyatoslav R.
Tested-by: Andreas Westman Dorcsak hedmoo@yahoo.com # ASUS TF T30 Tested-by: Robert Eckelmann longnoserob@gmail.com # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel clamor95@gmail.com # LG P895 T30 Signed-off-by: Svyatoslav Ryhel clamor95@gmail.com
arch/arm/include/asm/arch-tegra/tegra_i2c.h | 17 ++++++++++ arch/arm/mach-tegra/cpu.h | 1 - arch/arm/mach-tegra/tegra124/cpu.c | 4 +++ arch/arm/mach-tegra/tegra30/cpu.c | 37 +++++++-------------- 4 files changed, 33 insertions(+), 26 deletions(-)
Regards, Simon