On 23/11/2011 13:44, Igor Grinberg wrote:
Hi Stefano,
Hi Igor,
+/*
- NS16550 Configuration
- */
+#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
+#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
Can this be inlined? instead of defining the define...
Yes, I will do it.
+#define CONFIG_OMAP_EHCI_PHY1_RESET 25
The latest patch from Ilya makes it: CONFIG_OMAP_EHCI_PHY1_RESET_GPIO
Ok, thanks, I will fix it.
+#define CONFIG_JFFS2_NAND +/* nand device jffs2 lives on */ +#define CONFIG_JFFS2_DEV "nand0" +/* start of jffs2 partition */ +#define CONFIG_JFFS2_PART_OFFSET 0x680000 +#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
Can SZ_* defines from arch/arm/include/asm/sizes.h be used here?
I will drop the JFFS2 at all. If a JFFS2 is required, this should be not put in this common file, but in the board specific file.
+#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */ +#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */ +#endif
These can be removed, as already done in a recent patch from Thomas: http://patchwork.ozlabs.org/patch/127087/
Thanks, I will do it.
+/* SDRAM Bank Allocation method */ +/* TODO : Check */ +/* #define SDRC_R_B_C 1 */
This is also, removed by a patch from Thomas: http://patchwork.ozlabs.org/patch/127145/
Ok !
+#define CONFIG_MII +#define CONFIG_EMAC_MDIO_PHY_NUM 0 +#define CONFIG_BOOTP_DEFAULT
Can this be aligned with all the others?
Yes, of course.
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
CONFIG_SYS_NAND_ECCSTEPS)+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
Here (and in some more places) you have spaces for alignment.
I will recheck, thanks.
best regards, Stefano babic