On 05/04/2016 15:43, Tom Rini wrote:
On Tue, Apr 05, 2016 at 04:53:28PM +0800, Peng Fan wrote:
Hi Tom,
I know this already merged to i.mx tree. I still have a question for the tIH-CA violation.
It's not in mainline 'tho so it can always come out :)
Right - it is still in u-boot-imx, and I can revert it before my PR.
In my side, the value is ok. clk is 400MHz. (0x30 * 256.0) * (1000000000000.0/400000000.0) = 468.75ps. And according to spec, to 800M date rate, the minimum tIH value is 290ps.
So I wonder how in your side it is tIH-CA violation.
The board we measured this on is based on the mx6slevk and this particular part of the board (layout, etc) is unchanged. Micron put the board under analysis and measured these violations (along with that we don't issue a reset before configuring CS1, I still might try and push that change up for the EVK at least, not armadillo tho).
Stefano