Hi Gregg,
On Thursday 06 October 2005 19:37, Gregg Nemas wrote:
I am trying to perform I/O with a device attached to the external peripheral bus on a PPC440GP embedded processor. I am able to address the device and read and write to it, but I am only able to do non-burst I/O. Do I need to do something special to enable burst transactions? I've programmed the EBC0_B5CR and EBC0_B5AP device control registers appropriately to enable burst mode, but the transactions are still single I/O.
I've been testing this by using the u-boot mw.l command. Do I need to use PPC-specific instructions to perform burst I/O, or should an ordinary programmed I/O (using 32-bit write operations) be automatically queued up and converted to burst transactions?
Do you want to transfer bigger chunks of data? If yes, you may want to take a look at the dma controller of the 440gp. It definately is able to generate burst transactions and probably the ideal solution for your needs.
Another way to get burst transactions, is of course to use the cache, but I don't think that this is what you are looking for.
Best regards, Stefan