On 01.06.20 at 10:18, Michal Simek wrote:
SPL is community effort and not supported flow by Xilinx. If you want to use it, use it but don't expect any help from Xilinx to help you with issues. I take care about it, use it but there is no planning behind. I am fixing issues for me and for the rest please send a patch and I will take a look. As far as I know JTAG, SD and qspi(but limited) flows should work. I use SD boot most of the time.
Thanks for the clarification.
If you want to pack bitstream to u-boot.img/itb then it should be quite easy to do and all things are in place.
How is the official U-Boot way, to use the created image on ZYNQ boards or which generated files must be placed on a SD card? Unfortunately I couldn't find any information in the docs at this time. I have tried to create the image with the (custom) bitstream file. Used a FIT source (based on <arch/arm/mach-zynqmp/mkimage_fit_atf.sh>) which I have attached. But I have no idea how place the image on the SD card. Tried a simple...
$ dd=if=/path/to/U-Boot/u-boot.img of=/dev/sdf
but didn't work. Also tried to rename the image to BOOT.BIN and place it in the root directory of a FAT32 filesystem.
When I use the Xilinx tools to generate the image with following, it works:
* Vivado: Create bitstream from design * Vitis: Create and build FSBL * Build U-Boot * Create BIF:
image { [bootloader]fsbl.elf fpga.bit u-boot.elf }
* Use bootgen to create the image * Create FAT32 filesystem on SD card * Place generated image (BOOT.BIN) to root directory
Kind regards, Johannes K.