This add some basic files required to allow the board to dispaly serial message and can run command(mmc info etc)
Signed-off-by: Lin Huang hl@rock-chips.com --- Changes in v1: - clean copyright announcement Changes in v2: - get sdram info from evb_rk3036.c
arch/arm/dts/Makefile | 3 +- arch/arm/dts/rk3036-sdk.dts | 46 ++++++++++++++++++++++++++++++ board/evb_rk3036/evb_rk3036/Kconfig | 15 ++++++++++ board/evb_rk3036/evb_rk3036/MAINTAINERS | 0 board/evb_rk3036/evb_rk3036/Makefile | 7 +++++ board/evb_rk3036/evb_rk3036/evb_rk3036.c | 48 ++++++++++++++++++++++++++++++++ configs/evb-rk3036_defconfig | 29 +++++++++++++++++++ include/configs/evb_rk3036.h | 12 ++++++++ 8 files changed, 159 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/rk3036-sdk.dts create mode 100644 board/evb_rk3036/evb_rk3036/Kconfig create mode 100644 board/evb_rk3036/evb_rk3036/MAINTAINERS create mode 100644 board/evb_rk3036/evb_rk3036/Makefile create mode 100644 board/evb_rk3036/evb_rk3036/evb_rk3036.c create mode 100644 configs/evb-rk3036_defconfig create mode 100644 include/configs/evb_rk3036.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 3babe65..d007199 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -17,7 +17,8 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ exynos5422-odroidxu3.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-firefly.dtb \ - rk3288-jerry.dtb + rk3288-jerry.dtb \ + rk3036-sdk.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ diff --git a/arch/arm/dts/rk3036-sdk.dts b/arch/arm/dts/rk3036-sdk.dts new file mode 100644 index 0000000..a83badb --- /dev/null +++ b/arch/arm/dts/rk3036-sdk.dts @@ -0,0 +1,46 @@ +/* + * (C) Copyright 2015 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; + +#include "rk3036.dtsi" + +/ { + model = "SDK-RK3036"; + compatible = "sdk,sdk-rk3036", "rockchip,rk3036"; + + chosen { + stdout-path = &uart2; + }; + + usb_control { + compatible = "rockchip,rk3036-usb-control"; + host_drv_gpio = <&gpio2 23 GPIO_ACTIVE_LOW>; + otg_drv_gpio = <&gpio0 26 GPIO_ACTIVE_LOW>; + }; +}; + +&i2c1 { + status = "okay"; + + hym8563: hym8563@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "xin32k"; + }; +}; + +&usb_host { + status = "okay"; +}; + +&usb_otg { + status = "okay"; + + dr_mode = "host"; +}; diff --git a/board/evb_rk3036/evb_rk3036/Kconfig b/board/evb_rk3036/evb_rk3036/Kconfig new file mode 100644 index 0000000..ae2a9eb --- /dev/null +++ b/board/evb_rk3036/evb_rk3036/Kconfig @@ -0,0 +1,15 @@ +if TARGET_EVB_RK3036 + +config SYS_BOARD + default "evb_rk3036" + +config SYS_VENDOR + default "evb_rk3036" + +config SYS_CONFIG_NAME + default "evb_rk3036" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/evb_rk3036/evb_rk3036/MAINTAINERS b/board/evb_rk3036/evb_rk3036/MAINTAINERS new file mode 100644 index 0000000..e69de29 diff --git a/board/evb_rk3036/evb_rk3036/Makefile b/board/evb_rk3036/evb_rk3036/Makefile new file mode 100644 index 0000000..0403836 --- /dev/null +++ b/board/evb_rk3036/evb_rk3036/Makefile @@ -0,0 +1,7 @@ +# +# (C) Copyright 2015 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += evb_rk3036.o diff --git a/board/evb_rk3036/evb_rk3036/evb_rk3036.c b/board/evb_rk3036/evb_rk3036/evb_rk3036.c new file mode 100644 index 0000000..52d45e5 --- /dev/null +++ b/board/evb_rk3036/evb_rk3036/evb_rk3036.c @@ -0,0 +1,48 @@ +/* + * (C) Copyright 2015 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <asm/arch/sdram_rk3036.h> +#include <asm/arch/uart.h> +#include <asm/io.h> +#include <common.h> +#include <dm.h> + +DECLARE_GLOBAL_DATA_PTR; + +void get_ddr_config(struct rk3036_ddr_config *config) +{ + /* K4B4G1646Q config */ + config->ddr_type = 3; + config->rank = 2; + config->cs0_row = 15; + config->cs1_row = 15; + + /* 8bank */ + config->bank = 3; + config->col = 10; + + /* 16bit bw */ + config->bw = 1; +} + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + gd->ram_size = sdram_size(); + + return 0; +} + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); +} +#endif diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig new file mode 100644 index 0000000..6585a34 --- /dev/null +++ b/configs/evb-rk3036_defconfig @@ -0,0 +1,29 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_ROCKCHIP_RK3036=y +CONFIG_TARGET_EVB_RK3036=y +CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +CONFIG_CLK=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_RESET=y +CONFIG_LED=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0x20068000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_ROCKCHIP_3036_PINCTRL=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_RAM=y +CONFIG_DM_MMC=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_ERRNO_STR=y diff --git a/include/configs/evb_rk3036.h b/include/configs/evb_rk3036.h new file mode 100644 index 0000000..aa07889 --- /dev/null +++ b/include/configs/evb_rk3036.h @@ -0,0 +1,12 @@ +/* + * (C) Copyright 2015 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <configs/rk3036_common.h> + +#endif