Dear Stefan Roese,
2009/4/28 Po-Yu Chuang ratbert.chuang@gmail.com:
Dear Stefan Roese,
Did you define CONFIG_FLASH_CFI_LEGACY (and CONFIG_SYS_FLASH_LEGACY_512Kx8)? IIRC then the SST FLASH chips are not completely CFI compatible. So you need to enable the JEDEC framework.
Yes, I have defined the fallowing macros:
#define CONFIG_SYS_FLASH_CFI #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_FLASH_CFI_LEGACY #define CONFIG_SYS_FLASH_LEGACY_512Kx8
SST39LF040 use addr1=0x5555 and addr2=0x2AAA, however, each sector is 0x1000 bytes.
Thus, if we issue command to "sector base (0x41000) + offset(0x5555)", it sends to 0x46555 and the chip fails to recognize that address.
I guess that SST39LF020 might suffer the same problem.
How do you think about this? I can submit a patch for it.
regards, Po-Yu Chuang