Get and enable ipg/per pwms clocks using dm api into imx_pwm_of_to_plat and imx_pwm_probe driver function
Signed-off-by: Tommaso Merciai tommaso.merciai@amarulasolutions.com --- Changes since v3: - Fix ipg/per clk declaration - Fix clk_get_by_name call - Fix clk_enable call
drivers/pwm/pwm-imx.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+)
diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 67dad21295..74b0817a05 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -24,6 +24,7 @@ int pwm_init(int pwm_id, int div, int invert) writel(0, &pwm->ir); return 0; } +#include <clk.h>
int pwm_config_internal(struct pwm_regs *pwm, unsigned long period_cycles, unsigned long duty_cycles, unsigned long prescale) @@ -148,6 +149,8 @@ void pwm_disable(int pwm_id) struct imx_pwm_priv { struct pwm_regs *regs; bool invert; + struct clk per_clk; + struct clk ipg_clk; };
static int imx_pwm_set_invert(struct udevice *dev, uint channel, @@ -193,15 +196,43 @@ static int imx_pwm_set_enable(struct udevice *dev, uint channel, bool enable)
static int imx_pwm_of_to_plat(struct udevice *dev) { + int ret; struct imx_pwm_priv *priv = dev_get_priv(dev);
priv->regs = dev_read_addr_ptr(dev);
+ ret = clk_get_by_name(dev, "per", &priv->per_clk); + if (ret) { + printf("Failed to get per_clk\n"); + return ret; + } + + ret = clk_get_by_name(dev, "ipg", &priv->ipg_clk); + if (ret) { + printf("Failed to get ipg_clk\n"); + return ret; + } + return 0; }
static int imx_pwm_probe(struct udevice *dev) { + int ret; + struct imx_pwm_priv *priv = dev_get_priv(dev); + + ret = clk_enable(&priv->per_clk); + if (ret) { + printf("Failed to enable per_clk\n"); + return ret; + } + + ret = clk_enable(&priv->ipg_clk); + if (ret) { + printf("Failed to enable ipg_clk\n"); + return ret; + } + return 0; }