This driver manages the low speed SPI controller present on this SoC.
Signed-off-by: Álvaro Fernández Rojas noltari@gmail.com Reviewed-by: Daniel Schwierzeck daniel.schwierzeck@gmail.com Reviewed-by: Jagan Teki jagan@openedev.com --- v8: no changes v7: no changes v6: no changes v5: no changes v4: no changes v3: no changes v2: add spi alias
arch/mips/dts/brcm,bcm63268.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/arch/mips/dts/brcm,bcm63268.dtsi b/arch/mips/dts/brcm,bcm63268.dtsi index 113a96bef8..6e3d9c3820 100644 --- a/arch/mips/dts/brcm,bcm63268.dtsi +++ b/arch/mips/dts/brcm,bcm63268.dtsi @@ -13,6 +13,10 @@ / { compatible = "brcm,bcm63268";
+ aliases { + spi0 = &lsspi; + }; + cpus { reg = <0x10000000 0x4>; #address-cells = <1>; @@ -136,6 +140,19 @@ #power-domain-cells = <1>; };
+ lsspi: spi@10000800 { + compatible = "brcm,bcm6358-spi"; + reg = <0x10000800 0x70c>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&periph_clk BCM63268_CLK_SPI>; + resets = <&periph_rst BCM63268_RST_SPI>; + spi-max-frequency = <20000000>; + num-cs = <8>; + + status = "disabled"; + }; + leds: led-controller@10001900 { compatible = "brcm,bcm6328-leds"; reg = <0x10001900 0x24>;