Add the GCC and TCSRCC clock driver for the SM8550 & SM8650 SoCs.
The GCC driver uses the clk-qcom infrastructure to support GDSCs, Resets and gates. While the TCSRCC is a simpler clock driver which only supports gates.
The GCC enable and set_rate callbacks contains some tweaks to setup clocks for Debug UART, SDCard controller and USB.
The TCSRCC gates returns the XO frequency, which is used by the Synopsys eUSB2 driver to determine the PHY configuration.
In addition, the drivers are enabled in the Qualcomm defconfig.
Signed-off-by: Neil Armstrong neil.armstrong@linaro.org --- Neil Armstrong (3): clk: qcom: Add SM8550 clock driver clk: qcom: Add SM8650 clock driver qcom_defconfig: enable SM8550 & SM8650 clock driver
configs/qcom_defconfig | 2 + drivers/clk/qcom/Kconfig | 16 ++ drivers/clk/qcom/Makefile | 2 + drivers/clk/qcom/clock-sm8550.c | 335 ++++++++++++++++++++++++++++++++++++++++ drivers/clk/qcom/clock-sm8650.c | 332 +++++++++++++++++++++++++++++++++++++++ 5 files changed, 687 insertions(+) --- base-commit: f0e6aba1218bca578605697eed8aa94582bf57bb change-id: 20240404-topic-sm8x50-clock-a76f8359b5fb
Best regards,