CPUCFG has an unlisted debug control register, which is used to disable external debug access.
Also, sun7i secondary core power controls are in CPUCFG, as there's no separate PRCM block.
Signed-off-by: Chen-Yu Tsai wens@csie.org --- arch/arm/include/asm/arch-sunxi/cpucfg.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-sunxi/cpucfg.h b/arch/arm/include/asm/arch-sunxi/cpucfg.h index f6d2f21d9d24..297cdd28c060 100644 --- a/arch/arm/include/asm/arch-sunxi/cpucfg.h +++ b/arch/arm/include/asm/arch-sunxi/cpucfg.h @@ -33,7 +33,12 @@ struct __packed sunxi_cpucfg_reg { u32 super_standy_flag; /* 0x1a0 */ u32 priv0; /* 0x1a4 */ u32 priv1; /* 0x1a8 */ - u8 res4[0x54]; /* 0x1ac */ + u8 res4[0x4]; /* 0x1ac */ + u32 cpu1_pwr_clamp; /* 0x1b0 sun7i only */ + u32 cpu1_pwroff; /* 0x1b4 sun7i only */ + u8 res5[0x2c]; /* 0x1b8 */ + u32 dbg_ctrl1; /* 0x1e4 */ + u8 res6[0x18]; /* 0x1e8 */ u32 idle_cnt0_low; /* 0x200 */ u32 idle_cnt0_high; /* 0x204 */ u32 idle_cnt0_ctrl; /* 0x208 */