On 09:53-20240212, Nishanth Menon wrote:
Add the Debounce configuration registers that need to be configured one time for the platform for the entire SoC.
Signed-off-by: Nishanth Menon nm@ti.com
arch/arm/mach-k3/include/mach/am62_hardware.h | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h b/arch/arm/mach-k3/include/mach/am62_hardware.h index 54380f36e161..06fcab01a5b7 100644 --- a/arch/arm/mach-k3/include/mach/am62_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62_hardware.h @@ -75,6 +75,9 @@
#define CTRLMMR_MCU_RST_CTRL (MCU_CTRL_MMR0_BASE + 0x18170)
+/* Debounce register configuration */ +#define CTRLMMR_DBOUNCE_CFG(index) (MCU_CTRL_MMR0_BASE + 4080 + (index * 4))
Grrr.. missed the fixup for 0x4080 here. will wait a couple of days for any other review comments.
#define ROM_EXTENDED_BOOT_DATA_INFO 0x43c3f1e0
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000
2.43.0