On 8/24/06, Wolfgang Denk <wd@denx.de> wrote:

In message <b4ebaa9d0608240455p26c28d4ey2ebf3768f986c8c2@mail.gmail.com> you wrote:
>
> I want to apply some simple tests on MPC855T and need to turn on both
> instruction- and data-cache. I have used the codes in cpu/mpc8xx/start.S(as

Please read the README to understand why this is not so easy.

> follows), but it crashes while trying to write IDC_ENABLE to DC_CST. Do I
> have to enable the MMU first? If so,

This is one option, but it may require lots of changes everywhere  in
the  8xx  drivers.  Another  option is to make sure you run your code
without using any  U-Boot  services  (and  interrupts  disabled)  and
disable DC before returning.

> how? I have tried the code in
> linuxppc_2_4_devel/arch/ppc/kernel/head_8xx.S, it also crashes while
> trying to write MSR_DR|MSR_IR to msr.

U-Boot is not Linux, so no big surprise...

Best regards,

Wolfgang Denk

--
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
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