13 Nov
2018
13 Nov
'18
5:32 p.m.
On Mon, Oct 29, 2018 at 2:08 PM Maxime Ripard maxime.ripard@bootlin.com wrote:
On Sun, Oct 28, 2018 at 02:26:12PM -0700, Vasily Khoruzhick wrote:
From: Icenowy Zheng icenowy@aosc.io
DE2 SoCs can support LCDs up to 1080p (e.g. A64), and 3MHz step won't let PLL_VIDEO be high enough for them.
Use 6MHz step for PLL_VIDEO when using DE2, to satisfy 1080p LCD.
Signed-off-by: Icenowy Zheng icenowy@aosc.io Signed-off-by: Vasily Khoruzhick anarsoul@gmail.com Tested-by: Vasily Khoruzhick anarsoul@gmail.com
I wonder if this will cause any issues with panels and lower resolutions that will have a smaller tolerancy.
Does it impact lower resolution panels? is it tested?