This patch add's the defines for port d I/Os on AT91RM9200 (BGA package)
Signed-off-by: Jens Scharsig esw@bus-elektronik.de ---
diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index 95db017..308dea1 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -634,10 +634,12 @@ typedef struct _AT91S_PDC #define AT91C_PIO_PB21 ((unsigned int) 1 << 21) /* Pin Controlled by PB21 */ #define AT91C_PB21_TXD1 AT91C_PIO_PB21 /* USART1 Transmit Data */
+ #define AT91C_ID_SYS ((unsigned int) 1) /* System Peripheral */ #define AT91C_ID_PIOA ((unsigned int) 2) /* PIO port A */ #define AT91C_ID_PIOB ((unsigned int) 3) /* PIO port B */ #define AT91C_ID_PIOC ((unsigned int) 4) /* PIO port C */ +#define AT91C_ID_PIOD ((unsigned int) 5) /* PIO port D BGA only */ #define AT91C_ID_USART0 ((unsigned int) 6) /* USART 0 */ #define AT91C_ID_USART1 ((unsigned int) 7) /* USART 1 */ #define AT91C_ID_TWI ((unsigned int) 12) /* Two Wire Interface */ @@ -730,6 +732,35 @@ typedef struct _AT91S_PDC #define AT91C_PB12_TF2 ((unsigned int) AT91C_PIO_PB12) /* SSC Transmit Frame Sync 2 */ #define AT91C_PB12_ETX2 ((unsigned int) AT91C_PIO_PB12) /* Ethernet MAC Transmit Data 2 */
+#define AT91C_PIO_PD0 ((unsigned int) 1 << 0) /* Pin Controlled by PD0 */ +#define AT91C_PIO_PD1 ((unsigned int) 1 << 1) /* Pin Controlled by PD1 */ +#define AT91C_PIO_PD2 ((unsigned int) 1 << 2) /* Pin Controlled by PD2 */ +#define AT91C_PIO_PD3 ((unsigned int) 1 << 3) /* Pin Controlled by PD3 */ +#define AT91C_PIO_PD4 ((unsigned int) 1 << 4) /* Pin Controlled by PD4 */ +#define AT91C_PIO_PD5 ((unsigned int) 1 << 5) /* Pin Controlled by PD5 */ +#define AT91C_PIO_PD6 ((unsigned int) 1 << 6) /* Pin Controlled by PD6 */ +#define AT91C_PIO_PD7 ((unsigned int) 1 << 7) /* Pin Controlled by PD7 */ +#define AT91C_PIO_PD8 ((unsigned int) 1 << 8) /* Pin Controlled by PD8 */ +#define AT91C_PIO_PD9 ((unsigned int) 1 << 9) /* Pin Controlled by PD9 */ +#define AT91C_PIO_PD10 ((unsigned int) 1 << 10) /* Pin Controlled by PD10 */ +#define AT91C_PIO_PD11 ((unsigned int) 1 << 11) /* Pin Controlled by PD11 */ +#define AT91C_PIO_PD12 ((unsigned int) 1 << 12) /* Pin Controlled by PD12 */ +#define AT91C_PIO_PD13 ((unsigned int) 1 << 13) /* Pin Controlled by PD13 */ +#define AT91C_PIO_PD14 ((unsigned int) 1 << 14) /* Pin Controlled by PD14 */ +#define AT91C_PIO_PD15 ((unsigned int) 1 << 15) /* Pin Controlled by PD15 */ +#define AT91C_PIO_PD16 ((unsigned int) 1 << 16) /* Pin Controlled by PD16 */ +#define AT91C_PIO_PD17 ((unsigned int) 1 << 17) /* Pin Controlled by PD17 */ +#define AT91C_PIO_PD18 ((unsigned int) 1 << 18) /* Pin Controlled by PD18 */ +#define AT91C_PIO_PD19 ((unsigned int) 1 << 19) /* Pin Controlled by PD19 */ +#define AT91C_PIO_PD20 ((unsigned int) 1 << 20) /* Pin Controlled by PD20 */ +#define AT91C_PIO_PD21 ((unsigned int) 1 << 21) /* Pin Controlled by PD21 */ +#define AT91C_PIO_PD22 ((unsigned int) 1 << 22) /* Pin Controlled by PD22 */ +#define AT91C_PIO_PD23 ((unsigned int) 1 << 23) /* Pin Controlled by PD23 */ +#define AT91C_PIO_PD24 ((unsigned int) 1 << 24) /* Pin Controlled by PD24 */ +#define AT91C_PIO_PD25 ((unsigned int) 1 << 25) /* Pin Controlled by PD25 */ +#define AT91C_PIO_PD26 ((unsigned int) 1 << 26) /* Pin Controlled by PD26 */ +#define AT91C_PIO_PD27 ((unsigned int) 1 << 27) /* Pin Controlled by PD27 */ + #define AT91C_PIOB_BSR ((AT91_REG *) 0xFFFFF674) /* (PIOB) Select B Register */ #define AT91C_PIOB_PDR ((AT91_REG *) 0xFFFFF604) /* (PIOB) PIO Disable Register */