Hi Simon,
On Sun, Jan 4, 2015 at 10:31 AM, Simon Glass sjg@chromium.org wrote:
Hi Bin,
On 3 January 2015 at 07:40, Bin Meng bmeng.cn@gmail.com wrote:
By default U-Boot automatically calibrates TSC running frequency via MSR and PIT. The calibration may not work on every x86 processor, so a new Kconfig option CONFIG_TSC_CALIBRATION_BYPASS is introduced to allow bypassing the calibration and assign a hardcoded TSC frequency CONFIG_TSC_FREQ_IN_MHZ.
Normally the bypass should be turned on in a simulation environment like qemu.
Signed-off-by: Bin Meng bmeng.cn@gmail.com
Acked-by: Simon Glass sjg@chromium.org
But see my optional thoughts below.
arch/x86/Kconfig | 18 ++++++++++++++++++ arch/x86/lib/tsc_timer.c | 8 ++++++-- 2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index ebf72b3..9c11f0e 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -317,6 +317,24 @@ config FRAMEBUFFER_VESA_MODE
endmenu
+config TSC_CALIBRATION_BYPASS
bool "Bypass TSC calibration"default nhelpBy default U-Boot automatically calibrates TSC running frequency viaMSR and PIT. If the calibration does not work on your board, selectthis option and provide a hardcoded TSC running frequency below.Do you think TSC, MSR and PIT should be spelled out in the help? I worry that people won't make much sense of this. For example, if PIT is Platform Independent Timer we could save 'Platform Independent Timer (PIT)'.
Yes, a good idea. I can respin a v2 patch.
Regards, Bin