
The function get_cpu_rev() is called multiple times during execution resulting in probe into the IDCODE register to extract the revision information.
This patch does the following: - Moves the steps to identify static cpu information into arch_cpu_init(). - Updates configs for all omap3 boards to define CONFIG_ARCH_CPU_INIT. - Updates get_cpu_rev() to return value calculated in arch_cpu_init(). - Since revision isn't expected to be longer than 8bits, get_cpu_rev() return a u8 value instead of u32.
Signed-off-by: Sanjeev Premi premi@ti.com --- cpu/arm_cortexa8/omap3/sys_info.c | 60 +++++++++++++++++++------------ include/asm-arm/arch-omap3/sys_proto.h | 2 +- include/configs/omap3_beagle.h | 2 + include/configs/omap3_evm.h | 2 + include/configs/omap3_overo.h | 2 + include/configs/omap3_pandora.h | 2 + include/configs/omap3_zoom1.h | 2 + include/configs/omap3_zoom2.h | 2 + 8 files changed, 50 insertions(+), 24 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c index 31b2003..40866ae 100644 --- a/cpu/arm_cortexa8/omap3/sys_info.c +++ b/cpu/arm_cortexa8/omap3/sys_info.c @@ -41,6 +41,41 @@ static char *rev_s[CPU_3XX_MAX_REV] = { "3.0", "3.1"};
+static u8 cpu_revision; + +/** + * Perform architecture specific initialization. + * + * Currently, it identifies the cpu revision. + */ +int arch_cpu_init (void) +{ + u32 cpuid = 0; + struct ctrl_id *id_base; + + /* + * On ES1.0 the IDCODE register is not exposed on L4 + * so using CPU ID to differentiate between ES1.0 and > ES1.0. + */ + __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid)); + if ((cpuid & 0xf) == 0x0) { + cpu_revision = CPU_3XX_ES10; + } else { + /* Decode the IDs on > ES1.0 */ + id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE; + + cpuid = readl(&id_base->idcode); + + cpu_revision = (cpuid >> CPU_3XX_ID_SHIFT) & 0xf; + + /* Some early ES2.0 seem to report rev 0, fix this */ + if(cpu_revision == 0) + cpu_revision = CPU_3XX_ES20; + } + + return 0; +} + /***************************************************************** * dieid_num_r(void) - read and set die ID *****************************************************************/ @@ -78,30 +113,9 @@ u32 get_cpu_type(void) /****************************************** * get_cpu_rev(void) - extract version info ******************************************/ -u32 get_cpu_rev(void) +u8 get_cpu_rev(void) { - u32 cpuid = 0; - struct ctrl_id *id_base; - - /* - * On ES1.0 the IDCODE register is not exposed on L4 - * so using CPU ID to differentiate between ES1.0 and > ES1.0. - */ - __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid)); - if ((cpuid & 0xf) == 0x0) - return CPU_3XX_ES10; - else { - /* Decode the IDs on > ES1.0 */ - id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE; - - cpuid = (readl(&id_base->idcode) >> CPU_3XX_ID_SHIFT) & 0xf; - - /* Some early ES2.0 seem to report ID 0, fix this */ - if(cpuid == 0) - cpuid = CPU_3XX_ES20; - - return cpuid; - } + return cpu_revision; }
/**************************************************** diff --git a/include/asm-arm/arch-omap3/sys_proto.h b/include/asm-arm/arch-omap3/sys_proto.h index 34bd515..1c99c45 100644 --- a/include/asm-arm/arch-omap3/sys_proto.h +++ b/include/asm-arm/arch-omap3/sys_proto.h @@ -40,7 +40,7 @@ void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, void watchdog_init(void); void set_muxconf_regs(void);
-u32 get_cpu_rev(void); +u8 get_cpu_rev(void); u32 get_mem_type(void); u32 get_sysboot_value(void); u32 is_gpmc_muxed(void); diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 19a5ec9..640562c 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -28,6 +28,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_ARCH_CPU_INIT 1 + /* * High Level Configuration Options */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index a5514ae..0e85393 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -33,6 +33,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_ARCH_CPU_INIT 1 + /* * High Level Configuration Options */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index ffb515d..4ff06a3 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -20,6 +20,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_ARCH_CPU_INIT 1 + /* * High Level Configuration Options */ diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index 6f21af3..fee592f 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -23,6 +23,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_ARCH_CPU_INIT 1 + /* * High Level Configuration Options */ diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index da4b677..8866cda 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -29,6 +29,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_ARCH_CPU_INIT 1 + /* * High Level Configuration Options */ diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h index 32cd6fd..5381aa9 100644 --- a/include/configs/omap3_zoom2.h +++ b/include/configs/omap3_zoom2.h @@ -30,6 +30,8 @@ #ifndef __CONFIG_H #define __CONFIG_H
+#define CONFIG_ARCH_CPU_INIT 1 + /* * High Level Configuration Options */