Re: [U-Boot] [PATCH] at91: add support for PM9263 board

On 18:30 Thu 06 Nov , Ilko Iliev wrote:

This patch adds support for the PM9263 board of Ronetix GmbH (www.ronetix.at)

It will be nice it you could generate patch to see duplicate code to simplify the review. This is >70% the same as the at91sam9263

As I announe I've send the common for RFC please take a look

Signed-off-by: Ilko Iliev iliev@ronetix.at

MAKEALL | 1 + Makefile | 3 + board/ronetix/pm9263/Makefile | 60 ++++ board/ronetix/pm9263/config.mk | 1 + board/ronetix/pm9263/pm9263.c | 504 +++++++++++++++++++++++++++ board/ronetix/pm9263/pm9263_led.c | 66 ++++ board/ronetix/pm9263/pm9263_lowlevel_init.S | 376 ++++++++++++++++++++ board/ronetix/pm9263/pm9263_nand.c | 79 +++++ board/ronetix/pm9263/pm9263_partition.c | 47 +++ include/configs/pm9263.h | 279 +++++++++++++++ tools/Makefile | 3 + tools/logos/ronetix.bmp | Bin 0 -> 5638 bytes 12 files changed, 1419 insertions(+), 0 deletions(-) create mode 100644 board/ronetix/pm9263/Makefile create mode 100644 board/ronetix/pm9263/config.mk create mode 100644 board/ronetix/pm9263/pm9263.c create mode 100644 board/ronetix/pm9263/pm9263_led.c create mode 100644 board/ronetix/pm9263/pm9263_lowlevel_init.S create mode 100644 board/ronetix/pm9263/pm9263_nand.c create mode 100644 board/ronetix/pm9263/pm9263_partition.c create mode 100644 include/configs/pm9263.h create mode 100644 tools/logos/ronetix.bmp

diff --git a/MAKEALL b/MAKEALL index 1f56ac5..a1df37b 100755 --- a/MAKEALL +++ b/MAKEALL @@ -545,6 +545,7 @@ LIST_at91=" \ kb9202 \ mp2usb \ m501sk \

• pm9263 \

"

######################################################################### diff --git a/Makefile b/Makefile index 983a3cd..7d43159 100644 --- a/Makefile +++ b/Makefile @@ -2561,6 +2561,9 @@ at91cap9adk_config : unconfig at91sam9260ek_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm926ejs at91sam9260ek atmel at91

+pm9263_config : unconfig

• @$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91

######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info. integratorap_config \ diff --git a/board/ronetix/pm9263/Makefile b/board/ronetix/pm9263/Makefile new file mode 100644 index 0000000..342bfca --- /dev/null +++ b/board/ronetix/pm9263/Makefile @@ -0,0 +1,60 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Pop stelian.pop@leadtechdesign.com +# Lead Tech Design <www.leadtechdesign.com> +# Ilko Iliev <www.ronetix.at> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#

+include $(TOPDIR)/config.mk

+LIB = $(obj)lib$(BOARD).a

+COBJS-y += pm9263.o +COBJS-y += pm9263_led.o +COBJS-y += pm9263_partition.o +COBJS-$(CONFIG_CMD_NAND) += pm9263_nand.o

+SOBJS := pm9263_lowlevel_init.o

+SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS))

+$(LIB): $(obj).depend $(OBJS) $(SOBJS)

• $(call cmd_link_o_target, $@, $(OBJS))

^^^^^ please remove

+clean:

• rm -f $(SOBJS) $(OBJS)

+distclean: clean

• rm -f $(LIB) core *.bak $(obj).depend

+#########################################################################

+# defines $(obj).depend target +include $(SRCTREE)/rules.mk

+sinclude $(obj).depend

+######################################################################### diff --git a/board/ronetix/pm9263/config.mk b/board/ronetix/pm9263/config.mk new file mode 100644 index 0000000..ff2cfd1 --- /dev/null +++ b/board/ronetix/pm9263/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/ronetix/pm9263/pm9263.c b/board/ronetix/pm9263/pm9263.c new file mode 100644 index 0000000..a64fa4b --- /dev/null +++ b/board/ronetix/pm9263/pm9263.c @@ -0,0 +1,504 @@ +/*

• • (C) Copyright 2007-2008
• • Stelian Pop stelian.pop@leadtechdesign.com
• • Lead Tech Design <www.leadtechdesign.com>
• • Ilko Iliev <www.ronetix.at>
• • See file CREDITS for list of people who contributed to this
• • project.
• • This program is free software; you can redistribute it and/or
• • modify it under the terms of the GNU General Public License as
• • published by the Free Software Foundation; either version 2 of
• • the License, or (at your option) any later version.
• • This program is distributed in the hope that it will be useful,
• • but WITHOUT ANY WARRANTY; without even the implied warranty of
• • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
• • GNU General Public License for more details.
• • You should have received a copy of the GNU General Public License
• • along with this program; if not, write to the Free Software
• • Foundation, Inc., 59 Temple Place, Suite 330, Boston,
• • MA 02111-1307 USA
• */

+#include <common.h> +#include <asm/sizes.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9263_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#include <asm/arch/hardware.h> +#include <lcd.h> +#include <atmel_lcdc.h> +#include <dataflash.h> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) +#include <net.h> +#endif +#include <netdev.h>

+DECLARE_GLOBAL_DATA_PTR;

+/* ------------------------------------------------------------------------- */ +/*

• • Miscelaneous platform dependent initialisations
• */

+static void pm9263_serial_hw_init(void) +{ +#ifdef CONFIG_USART0

• at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */
• at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */
• at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0);

please update to AT91SAM9263_ID_USx

+#endif

+#ifdef CONFIG_USART1

• at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
• at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
• at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1);

please update to AT91SAM9263_ID_USx

+#endif

+#ifdef CONFIG_USART2

• at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
• at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
• at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2);

please update to AT91SAM9263_ID_USx

+#endif

+#ifdef CONFIG_USART3 /* DBGU */

• at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
• at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
• at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS);

please update to AT91SAM9263_ID_USx

+#endif +}

+#ifdef CONFIG_CMD_NAND +static void pm9263_nand_hw_init(void) +{

• unsigned long csa;
• /* Enable CS3 */
• csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
• at91_sys_write(AT91_MATRIX_EBI0CSA,

•        csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA);
  

• /* Configure SMC CS3 for NAND/SmartMedia */
• at91_sys_write(AT91_SMC_SETUP(3),

•        AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
  

•        AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
  

• at91_sys_write(AT91_SMC_PULSE(3),

•        AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
  

•        AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
  

• at91_sys_write(AT91_SMC_CYCLE(3),

•        AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
  

• at91_sys_write(AT91_SMC_MODE(3),

•        AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
  

•        AT91_SMC_EXNWMODE_DISABLE |
  

+#ifdef CFG_NAND_DBW_16

please update to CONFIG_SYS

•        AT91_SMC_DBW_16 |
  

+#else /* CFG_NAND_DBW_8 */

•        AT91_SMC_DBW_8 |
  

+#endif

•        AT91_SMC_TDF_(2));
  

• /* Configure RDY/BSY */
• at91_set_gpio_input(AT91_PIN_PB30, 1);
• /* Enable NandFlash */
• at91_set_gpio_output(AT91_PIN_PD15, 1);

why don't you initialize the clock here?

+} +#endif

+#ifdef CONFIG_HAS_DATAFLASH +static void pm9263_spi_hw_init(void) +{

• at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */
• at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
• at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
• at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
• /* Enable clock */
• at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0);

+} +#endif

+#ifdef CONFIG_MACB +static void pm9263_macb_hw_init(void) +{

• /* Enable clock */
• at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
• /*

• * Disable pull-up on:
  

• *	RXDV (PC25) => PHY normal mode (not Test mode)
  

• * 	ERX0 (PE25) => PHY ADDR0
  

^ whitespace please remove

• *	ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0
  

• *
  

• * PHY has internal pull-down
  

• */
  

• writel(pin_to_mask(AT91_PIN_PC25),

•       pin_to_controller(AT91_PIN_PC0) + PIO_PUDR);
  

• writel(pin_to_mask(AT91_PIN_PE25) |

•       pin_to_mask(AT91_PIN_PE26),
  

•       pin_to_controller(AT91_PIN_PE0) + PIO_PUDR);
  

• /* Re-enable pull-up */
• writel(pin_to_mask(AT91_PIN_PC25),

•       pin_to_controller(AT91_PIN_PC0) + PIO_PUER);
  

• writel(pin_to_mask(AT91_PIN_PE25) |

•       pin_to_mask(AT91_PIN_PE26),
  

•       pin_to_controller(AT91_PIN_PE0) + PIO_PUER);
  

• at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */
• at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */
• at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */
• at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */
• at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */
• at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */
• at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */
• at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */
• at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */
• at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */

+#ifndef CONFIG_RMII

• at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */
• at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
• at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
• at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
• at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
• at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
• at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
• at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */

+#endif

+} +#endif

+#ifdef CONFIG_USB_OHCI_NEW +static void pm9263_uhp_hw_init(void) +{

• /* Enable VBus on UHP ports */
• at91_set_gpio_output(AT91_PIN_PA21, 0);
• at91_set_gpio_output(AT91_PIN_PA24, 0);

+} +#endif

+#ifdef CONFIG_LCD

please move the lcd to a lcd.c file

+vidinfo_t panel_info = {

• vl_col: 240,
• vl_row: 320,
• vl_clk: 4965000,
• vl_sync: ATMEL_LCDC_INVLINE_INVERTED |

• 	ATMEL_LCDC_INVFRAME_INVERTED,
  

• vl_bpix: 3,
• vl_tft: 1,
• vl_hsync_len: 5,
• vl_left_margin: 1,
• vl_right_margin:33,
• vl_vsync_len: 1,
• vl_upper_margin:1,
• vl_lower_margin:0,
• mmio: AT91SAM9263_LCDC_BASE,

+};

+void lcd_enable(void) +{

• at91_set_gpio_value(AT91_PIN_PA22, 1); /* power up */

+}

+void lcd_disable(void) +{

• at91_set_gpio_value(AT91_PIN_PA22, 0); /* power down */

+}

+#ifdef LCD_IN_PSRAM

+#define PSRAM_CRE_PIN AT91_PIN_PB29 +#define PSRAM_CTRL_REG (PHYS_PSRAM + PHYS_PSRAM_SIZE - 2)

+/* Initialize the PSRAM memory */ +static int pm9263_lcd_hw_psram_init(void) +{ +volatile uint16_t *p; +volatile uint16_t x;

• /* setup PB29 as output */
• at91_set_gpio_output(PSRAM_CRE_PIN, 1);
• at91_set_gpio_value(PSRAM_CRE_PIN, 0); /* set PSRAM_CRE_PIN to '0' */
• p = (volatile uint16_t *) PSRAM_CTRL_REG;

please use readx/writex and so on

• /* PSRAM: write BCR */
• x = *p; /* mem r16 0x703ffffe 1 */
• x = *p; /* mem r16 0x703ffffe 1 */
• *p = 1; /* mem w16 0x703ffffe 1 ; 0 for RCR, 1 for BCR */
• *p = 0x9d4f; /* write the BCR */
• /* write RCR of the PSRAM */
• p = (volatile uint16_t *) PSRAM_CTRL_REG;
• x = *p; /* mem r16 0x703ffffe 1 */
• x = *p; /* mem r16 0x703ffffe 1 */
• *p = 0; /* mem w16 0x703ffffe 0 ; 0 for RCR, 1 for BCR */
• *p = 0x90; /* set RCR; 0x10 - async mode, 0x90 - page mode */
• /* test to see if the PSRAM is MT45W2M16A or MT45W2M16B

•   MT45W2M16B - CRE must be 0
  

•   MT45W2M16A - CRE must be 1
  

• */

please use this style of comment

• p = (volatile uint16_t *) PHYS_PSRAM;
• p[0] = 0x1234;
• p[1] = 0x5678;

^^^^^ whitespace please remove

• /* test if the chip is MT45W2M16B */
• if ( (p[0] != 0x1234) || (p[1] != 0x5678) )
• {

• /* try with CRE=1 (MT45W2M16A) */
  

• at91_set_gpio_value(PSRAM_CRE_PIN, 1);  /* set PSRAM_CRE_PIN to '1' */
  

^^^^^^^^^^^^^ whitespace please remove

• /* write RCR of the PSRAM */
  

• p = (volatile uint16_t *) PSRAM_CTRL_REG;
  

• x = *p;		/* mem r16 0x703ffffe 1 */
  

• x = *p;		/* mem r16 0x703ffffe 1 */
  

• *p = 0;		/* mem w16 0x703ffffe 0 ; 0 for RCR, 1 for BCR */
  

^^^^^^^^^^^^^ whitespace please remove

• *p = 0x90;	/* set RCR; 0x10 - async mode, 0x90 - page mode */
  

• p = (volatile uint16_t *) PHYS_PSRAM;
  

• p[0] = 0x1234;
  

• p[1] = 0x5678;
  

• if ( (p[0] != 0x1234) || (p[1] != 0x5678) )
  

• 	return 1;	
  

^^^^^^^ whitespace please remove and so on

• }
• return 0;

+} +#endif

+static void pm9263_lcd_hw_init(void) +{

• at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
• at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
• at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
• at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
• at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
• at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
• at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
• at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
• at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
• at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
• at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
• at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
• at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
• at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
• at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
• at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
• at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
• at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
• at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
• at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
• at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
• at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
• at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_LCDC);
• /* Power Control */
• at91_set_gpio_output(AT91_PIN_PA22, 1);
• at91_set_gpio_value(AT91_PIN_PA22, 0); /* power down */

+#ifdef LCD_IN_PSRAM

please use CONFIG_

• /* initialize te PSRAM */
• int stat = pm9263_lcd_hw_psram_init();
• gd->fb_base = (stat == 0) ? PHYS_PSRAM : AT91SAM9263_SRAM0_BASE;

+#else

• gd->fb_base = AT91SAM9263_SRAM0_BASE;

+#endif

+}

+#ifdef CONFIG_LCD_INFO +#include <nand.h> +#include <version.h>

+extern flash_info_t flash_info[];

+void lcd_show_board_info(void) +{

• ulong dram_size, nand_size, flash_size, dataflash_size;
• int i;
• char temp[32];
• lcd_printf ("%s\n", U_BOOT_VERSION);
• lcd_printf ("(C) 2008 Ronetix GmbH\n");
• lcd_printf ("support@ronetix.at\n");
• lcd_printf ("%s CPU at %s MHz",

• AT91_CPU_NAME, 
  

• strmhz(temp, AT91_MAIN_CLOCK));
  

please use AT91_CPU_CLOCK

• dram_size = 0;
• for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)

• dram_size += gd->bd->bi_dram[i].size;
  

please fix all whitespace and remainig CFG_

Best Regards, J.