It is common to read a config register value, clear and set some bits, then write back the updated value. Add functions to do this in one step, for convenience.
Signed-off-by: Simon Glass sjg@chromium.org ---
drivers/pci/pci-uclass.c | 57 ++++++++++++++++++++++++++++++++++++++++++++++++ include/pci.h | 23 +++++++++++++++++++ 2 files changed, 80 insertions(+)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index d01bfc1..51e0e7a 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -252,6 +252,21 @@ int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset, return ops->write_config(bus, bdf, offset, value, size); }
+int pci_bus_clrset_config32(struct udevice *bus, pci_dev_t bdf, int offset, + u32 clr, u32 set) +{ + ulong val; + int ret; + + ret = pci_bus_read_config(bus, bdf, offset, &val, PCI_SIZE_32); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return pci_bus_write_config(bus, bdf, offset, val, PCI_SIZE_32); +} + int pci_write_config(pci_dev_t bdf, int offset, unsigned long value, enum pci_size_t size) { @@ -420,6 +435,48 @@ int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep) return 0; }
+int dm_pci_clrset_config8(struct udevice *dev, int offset, u32 clr, u32 set) +{ + u8 val; + int ret; + + ret = dm_pci_read_config8(dev, offset, &val); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return dm_pci_write_config8(dev, offset, val); +} + +int dm_pci_clrset_config16(struct udevice *dev, int offset, u32 clr, u32 set) +{ + u16 val; + int ret; + + ret = dm_pci_read_config16(dev, offset, &val); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return dm_pci_write_config16(dev, offset, val); +} + +int dm_pci_clrset_config32(struct udevice *dev, int offset, u32 clr, u32 set) +{ + u32 val; + int ret; + + ret = dm_pci_read_config32(dev, offset, &val); + if (ret) + return ret; + val &= ~clr; + val |= set; + + return dm_pci_write_config32(dev, offset, val); +} + static void set_vga_bridge_bits(struct udevice *dev) { struct udevice *parent = dev->parent; diff --git a/include/pci.h b/include/pci.h index 68548b0..db84744 100644 --- a/include/pci.h +++ b/include/pci.h @@ -1027,6 +1027,21 @@ int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset, unsigned long value, enum pci_size_t size);
/** + * pci_bus_clrset_config32() - Update a configuration value for a device + * + * The register at @offset is updated to (oldvalue & ~clr) | set. + * + * @bus: Bus to access + * @bdf: PCI device address: bus, device and function -see PCI_BDF() + * @offset: Register offset to update + * @clr: Bits to clear + * @set: Bits to set + * @return 0 if OK, -ve on error + */ +int pci_bus_clrset_config32(struct udevice *bus, pci_dev_t bdf, int offset, + u32 clr, u32 set); + +/** * Driver model PCI config access functions. Use these in preference to others * when you have a valid device */ @@ -1044,6 +1059,14 @@ int dm_pci_write_config8(struct udevice *dev, int offset, u8 value); int dm_pci_write_config16(struct udevice *dev, int offset, u16 value); int dm_pci_write_config32(struct udevice *dev, int offset, u32 value);
+/** + * These permit convenient read/modify/write on PCI configuration. The + * register is updated to (oldvalue & ~clr) | set. + */ +int dm_pci_clrset_config8(struct udevice *dev, int offset, u32 clr, u32 set); +int dm_pci_clrset_config16(struct udevice *dev, int offset, u32 clr, u32 set); +int dm_pci_clrset_config32(struct udevice *dev, int offset, u32 clr, u32 set); + /* * The following functions provide access to the above without needing the * size parameter. We are trying to encourage the use of the 8/16/32-style