
On Mon, 2019-04-01 at 23:05 +0000, Trent Piepho wrote:
This is a configuration option specific to the tegra controller.
Doing it this way makes it show up directly under the tegra controller option, indented one level, as "Disable external clock loopback".
The way it is now, it shows up at the end of the controller list, not indented, as if it's some kind of generic MMC configuration option.
Cc: Marcel Ziswiler marcel.ziswiler@toradex.com Cc: Simon Glass sjg@chromium.org Cc: Jaehoon Chung jh80.chung@samsung.com Cc: Tom Warren twarren@nvidia.com Signed-off-by: Trent Piepho tpiepho@impinj.com
Acked-by: Marcel Ziswiler marcel.ziswiler@toradex.com
drivers/mmc/Kconfig | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 08c2dd2541..759a1cceb4 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -542,6 +542,17 @@ config MMC_SDHCI_TEGRA
If unsure, say N.
+config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
- bool "Disable external clock loopback"
- depends on MMC_SDHCI_TEGRA && TEGRA124
- help
Disable the external clock loopback and use the internal one
on SDMMC3
as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
bits
being set to 0xfffd according to the TRM.
TODO(marcel.ziswiler@toradex.com): Move to device tree
controlled
approach once proper kernel integration made it mainline.
config MMC_SDHCI_ZYNQ bool "Arasan SDHCI controller support" depends on ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_VERSAL @@ -627,17 +638,6 @@ config FSL_ESDHC
endif
-config TEGRA124_MMC_DISABLE_EXT_LOOPBACK
- bool "Disable external clock loopback"
- depends on MMC_SDHCI_TEGRA && TEGRA124
- help
Disable the external clock loopback and use the internal one
on SDMMC3
as per the SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
bits
being set to 0xfffd according to the TRM.
TODO(marcel.ziswiler@toradex.com): Move to device tree
controlled
approach once proper kernel integration made it mainline.
endmenu
config SYS_FSL_ERRATUM_ESDHC111