Re: [U-Boot] [PATCH] omap4_panda: Initialize the USB phy

13 Dec 2011

Hi Chris,
On Tuesday 13 December 2011 06:34 PM, clalancette@gmail.com wrote:
...
From: Chris Lalancetteclalancette@gmail.com
During misc_init_r, make sure to setup the clocks
properly for the USB hub on the pandaboard.  With
this in place, the USB hub and the ethernet works
on the pandaboard.
I had created a similar patch a long time back. It's only now I realize
that I hadn't submitted it!! Anyway, here it is. I think there are a
couple of things that can be re-used to improve your patch.
1) You might want to replace the magic numbers with the symbols.
2) Run-time identification of the phy type.
From c41559a4353a9b0822de7055fc11923f260de9ac Mon Sep 17 00:00:00 2001
From: Aneesh V aneesh@ti.com
Date: Wed, 17 Aug 2011 17:43:20 +0530
Subject: [PATCH] omap4: usb clock init for Panda board
Signed-off-by: Aneesh V aneesh@ti.com
---
  arch/arm/include/asm/arch-omap4/clocks.h |   29 ++++++++++++++-
  board/ti/panda/panda.c                   |   61 
++++++++++++++++++++++++++++++
  2 files changed, 89 insertions(+), 1 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap4/clocks.h 
b/arch/arm/include/asm/arch-omap4/clocks.h
index 374e064..6092e67 100644
--- a/arch/arm/include/asm/arch-omap4/clocks.h
+++ b/arch/arm/include/asm/arch-omap4/clocks.h
@@ -467,7 +467,12 @@ struct omap4_prcm_regs {
    u32 prm_vc_cfg_channel;
    u32 prm_vc_cfg_i2c_mode;
    u32 prm_vc_cfg_i2c_clk;
-
+	u32 pad216[2392];
+	u32 altclksrc;
+	u32 pad217[128];
+	u32 auxclk1;
+	u32 auxclk2;
+	u32 auxclk3;
  };
/* DPLL register offsets */
@@ -628,6 +633,28 @@ struct omap4_prcm_regs {
  #define PRM_VC_VAL_BYPASS_DATA_SHIFT		16
  #define PRM_VC_VAL_BYPASS_DATA_MASK		0xFF
+/* AUXCLKx reg fields */
+#define AUXCLK_ENABLE_MASK		(1 << 8)
+#define AUXCLK_SRCSELECT_SHIFT		1
+#define AUXCLK_SRCSELECT_MASK		(3 << 1)
+#define AUXCLK_CLKDIV_SHIFT		16
+#define AUXCLK_CLKDIV_MASK		(0xF << 16)
+
+#define AUXCLK_SRCSELECT_SYS_CLK	0
+#define AUXCLK_SRCSELECT_CORE_DPLL	1
+#define AUXCLK_SRCSELECT_PER_DPLL	2
+#define AUXCLK_SRCSELECT_ALTERNATE	3
+
+#define AUXCLK_CLKDIV_2		1
+#define AUXCLK_CLKDIV_16		0xF
+
+/* ALTCLKSRC */
+#define ALTCLKSRC_MODE_MASK		3
+#define ALTCLKSRC_ENABLE_INT_MASK	4
+#define ALTCLKSRC_ENABLE_EXT_MASK	8
+
+#define ALTCLKSRC_MODE_ACTIVE		1
+
  /* SMPS */
  #define SMPS_I2C_SLAVE_ADDR	0x12
  #define SMPS_REG_ADDR_VCORE1	0x55
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index 9afed80..0c0b97a 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -24,15 +24,75 @@
  #include <common.h>
  #include <asm/arch/sys_proto.h>
  #include <asm/arch/mmc_host_def.h>
+#include <asm/arch/clocks.h>
+#include <asm/arch/gpio.h>
#include "panda_mux_data.h"
+#define PANDA_ULPI_PHY_TYPE_GPIO	182
+
  DECLARE_GLOBAL_DATA_PTR;
const struct omap_sysinfo sysinfo = {
    "Board: OMAP4 Panda\n"
  };
+static void usb_clk_init(void)
+{
+	u32 auxclk, altclksrc;
+	int phy_type;
+
+	/* EHCI is not supported on ES1.0 */
+	if (omap_revision() == OMAP4430_ES1_0)
+		return;
+
+	omap_set_gpio_direction(PANDA_ULPI_PHY_TYPE_GPIO, 1);
+	phy_type = omap_get_gpio_datain(PANDA_ULPI_PHY_TYPE_GPIO);
+
+	if (phy_type == 1) {
+		/* ULPI PHY supplied by auxclk3 derived from sys_clk */
+		debug("ULPI PHY supplied by auxclk3\n");
+
+		auxclk = readl(&prcm->auxclk3);
+		/* Select sys_clk */
+		auxclk &= ~AUXCLK_SRCSELECT_MASK;
+		auxclk |=  AUXCLK_SRCSELECT_SYS_CLK <<
+				AUXCLK_SRCSELECT_SHIFT;
+		/* Set the divisor to 2 */
+		auxclk &= ~AUXCLK_CLKDIV_MASK;
+		auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT;
+		/* Request auxilary clock #3 */
+		auxclk |= AUXCLK_ENABLE_MASK;
+
+		writel(auxclk, &prcm->auxclk3);
+	} else {
+		/* ULPI PHY supplied by auxclk1 derived from PER dpll */
+		debug("ULPI PHY supplied by auxclk1\n");
+
+		auxclk = readl(&prcm->auxclk1);
+		/* Select per DPLL */
+		auxclk &= ~AUXCLK_SRCSELECT_MASK;
+		auxclk |=  AUXCLK_SRCSELECT_PER_DPLL <<
+				AUXCLK_SRCSELECT_SHIFT;
+		/* Set the divisor to 16 */
+		auxclk &= ~AUXCLK_CLKDIV_MASK;
+		auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT;
+		/* Request auxilary clock #3 */
+		auxclk |= AUXCLK_ENABLE_MASK;
+
+		writel(auxclk, &prcm->auxclk1);
+	}
+
+	altclksrc = readl(&prcm->altclksrc);
+
+	/* Activate alternate system clock supplier */
+	altclksrc &= ~ALTCLKSRC_MODE_MASK;
+	altclksrc |= ALTCLKSRC_MODE_ACTIVE;
+	/* enable clocks */
+	altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK;
+
+	writel(altclksrc, &prcm->altclksrc);
+}
  /**
   * @brief board_init
   *
@@ -41,6 +101,7 @@ const struct omap_sysinfo sysinfo = {
  int board_init(void)
  {
    gpmc_init();
+	usb_clk_init();
gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA;
    gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
-- 
1.7.0.4


>
> Signed-off-by: Chris Lalancetteclalancette@gmail.com
> ---
>   arch/arm/include/asm/arch-omap4/omap.h |   42 ++++++++++++++++++++++++++++++++
>   board/ti/panda/panda.c                 |   16 ++++++++++++
>   2 files changed, 58 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
> index 4d8c89f..bdda199 100644
> --- a/arch/arm/include/asm/arch-omap4/omap.h
> +++ b/arch/arm/include/asm/arch-omap4/omap.h
> @@ -165,6 +165,48 @@ struct control_lpddr2io_regs {
>   	unsigned int control_lpddr2io2_2;
>   	unsigned int control_lpddr2io2_3;
>   };
> +
> +struct omap4_scrm_regs {
> +	u32 revision;		/* 0x0000 */
> +	u32 pad00[63];
> +	u32 clksetuptime;	/* 0x0100 */
> +	u32 pmicsetuptime;	/* 0x0104 */
> +	u32 pad01[2];
> +	u32 altclksrc;		/* 0x0110 */
> +	u32 pad02[2];
> +	u32 c2cclkm;		/* 0x011c */
> +	u32 pad03[56];
> +	u32 extclkreq;		/* 0x0200 */
> +	u32 accclkreq;		/* 0x0204 */
> +	u32 pwrreq;		/* 0x0208 */
> +	u32 pad04[1];
> +	u32 auxclkreq0;		/* 0x0210 */
> +	u32 auxclkreq1;		/* 0x0214 */
> +	u32 auxclkreq2;		/* 0x0218 */
> +	u32 auxclkreq3;		/* 0x021c */
> +	u32 auxclkreq4;		/* 0x0220 */
> +	u32 auxclkreq5;		/* 0x0224 */
> +	u32 pad05[3];
> +	u32 c2cclkreq;		/* 0x0234 */
> +	u32 pad06[54];
> +	u32 auxclk0;		/* 0x0310 */
> +	u32 auxclk1;		/* 0x0314 */
> +	u32 auxclk2;		/* 0x0318 */
> +	u32 auxclk3;		/* 0x031c */
> +	u32 auxclk4;		/* 0x0320 */
> +	u32 auxclk5;		/* 0x0324 */
> +	u32 pad07[54];
> +	u32 rsttime_reg;	/* 0x0400 */
> +	u32 pad08[6];
> +	u32 c2crstctrl;		/* 0x041c */
> +	u32 extpwronrstctrl;	/* 0x0420 */
> +	u32 pad09[59];
> +	u32 extwarmrstst_reg;	/* 0x0510 */
> +	u32 apewarmrstst_reg;	/* 0x0514 */
> +	u32 pad10[1];
> +	u32 c2cwarmrstst_reg;	/* 0x051C */
> +};
> +
>   #endif /* __ASSEMBLY__ */
>
>   /*
> diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
> index b4271fb..6f847c4 100644
> --- a/board/ti/panda/panda.c
> +++ b/board/ti/panda/panda.c
> @@ -33,6 +33,8 @@ const struct omap_sysinfo sysinfo = {
>   	"Board: OMAP4 Panda\n"
>   };
>
> +struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;
> +
>   /**
>    * @brief board_init
>    *
> @@ -62,6 +64,20 @@ int board_eth_init(bd_t *bis)
>    */
>   int misc_init_r(void)
>   {
> +	if (omap_revision() != OMAP4430_ES1_0) {
> +		/* Enable the USB phy */
> +		/* enable software ioreq */
> +		sr32(&scrm->auxclk3, 8, 1, 0x1);
> +		/* set for sys_clk (38.4MHz) */
> +		sr32(&scrm->auxclk3, 1, 2, 0x0);
> +		/* set divisor to 2 */
> +		sr32(&scrm->auxclk3, 16, 4, 0x1);
> +		/* set the clock source to active */
> +		sr32(&scrm->altclksrc, 0, 1, 0x1);
> +		/* enable clocks */
> +		sr32(&scrm->altclksrc, 2, 2, 0x3);
> +	}
> +
>   	return 0;
>   }
>


    