On Wed, 2013-10-30 at 19:07 -0700, York Sun wrote:
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun yorksun@freescale.com
Makefile | 4 +- README | 39 ++++++++++++++-- arch/powerpc/cpu/mpc83xx/Makefile | 8 +--- arch/powerpc/cpu/mpc85xx/Makefile | 42 ----------------- arch/powerpc/cpu/mpc85xx/cpu.c | 16 +++---- arch/powerpc/cpu/mpc85xx/mp.c | 2 +- arch/powerpc/cpu/mpc86xx/Makefile | 3 -- arch/powerpc/cpu/mpc8xxx/ddr/Makefile | 45 ------------------ arch/powerpc/include/asm/config.h | 6 +++ arch/powerpc/include/asm/config_mpc85xx.h | 13 ++++++ arch/powerpc/include/asm/config_mpc86xx.h | 2 + arch/powerpc/include/asm/immap_83xx.h | 2 +- arch/powerpc/include/asm/immap_85xx.h | 6 +-- arch/powerpc/include/asm/immap_86xx.h | 4 +- board/exmeritus/hww1u1a/ddr.c | 4 +- board/exmeritus/hww1u1a/hww1u1a.c | 4 +- board/freescale/b4860qds/ddr.c | 6 +-- board/freescale/bsc9131rdb/ddr.c | 4 +- board/freescale/bsc9131rdb/spl_minimal.c | 4 +- board/freescale/bsc9132qds/bsc9132qds.c | 4 +- board/freescale/bsc9132qds/ddr.c | 4 +- board/freescale/bsc9132qds/spl_minimal.c | 4 +- board/freescale/c29xpcie/ddr.c | 4 +- board/freescale/corenet_ds/ddr.c | 4 +- board/freescale/corenet_ds/eth_p4080.c | 2 +- board/freescale/corenet_ds/p3041ds_ddr.c | 2 +- board/freescale/corenet_ds/p4080ds_ddr.c | 2 +- board/freescale/corenet_ds/p5020ds_ddr.c | 2 +- board/freescale/corenet_ds/p5040ds_ddr.c | 2 +- board/freescale/mpc8349emds/ddr.c | 4 +- board/freescale/mpc8349emds/mpc8349emds.c | 2 +- board/freescale/mpc8536ds/ddr.c | 4 +- board/freescale/mpc8536ds/mpc8536ds.c | 2 +- board/freescale/mpc8540ads/ddr.c | 4 +- board/freescale/mpc8540ads/mpc8540ads.c | 4 +- board/freescale/mpc8541cds/ddr.c | 4 +- board/freescale/mpc8541cds/mpc8541cds.c | 2 +- board/freescale/mpc8544ds/ddr.c | 4 +- board/freescale/mpc8544ds/mpc8544ds.c | 2 +- board/freescale/mpc8548cds/ddr.c | 4 +- board/freescale/mpc8548cds/mpc8548cds.c | 2 +- board/freescale/mpc8555cds/ddr.c | 4 +- board/freescale/mpc8555cds/mpc8555cds.c | 2 +- board/freescale/mpc8560ads/ddr.c | 4 +- board/freescale/mpc8560ads/mpc8560ads.c | 4 +- board/freescale/mpc8568mds/ddr.c | 4 +- board/freescale/mpc8568mds/mpc8568mds.c | 2 +- board/freescale/mpc8569mds/ddr.c | 4 +- board/freescale/mpc8569mds/mpc8569mds.c | 4 +- board/freescale/mpc8572ds/ddr.c | 4 +- board/freescale/mpc8572ds/mpc8572ds.c | 2 +- board/freescale/mpc8610hpcd/ddr.c | 4 +- board/freescale/mpc8610hpcd/mpc8610hpcd.c | 2 +- board/freescale/mpc8641hpcn/ddr.c | 4 +- board/freescale/mpc8641hpcn/mpc8641hpcn.c | 2 +- board/freescale/p1010rdb/ddr.c | 4 +- board/freescale/p1010rdb/spl_minimal.c | 4 +- board/freescale/p1022ds/ddr.c | 4 +- board/freescale/p1022ds/p1022ds.c | 2 +- board/freescale/p1022ds/spl_minimal.c | 2 +- board/freescale/p1023rdb/ddr.c | 4 +- board/freescale/p1023rdb/p1023rdb.c | 2 +- board/freescale/p1023rds/p1023rds.c | 4 +- board/freescale/p1_p2_rdb/ddr.c | 2 +- board/freescale/p1_p2_rdb_pc/ddr.c | 4 +- board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 +- board/freescale/p1_p2_rdb_pc/spl_minimal.c | 2 +- board/freescale/p1_twr/ddr.c | 4 +- board/freescale/p1_twr/p1_twr.c | 2 +- board/freescale/p2020come/ddr.c | 4 +- board/freescale/p2020ds/ddr.c | 4 +- board/freescale/p2020ds/p2020ds.c | 4 +- board/freescale/p2041rdb/ddr.c | 4 +- board/freescale/t1040qds/ddr.c | 4 +- board/freescale/t4qds/ddr.c | 4 +- board/freescale/t4qds/eth.c | 2 +- board/gdsys/p1022/controlcenterd.c | 2 +- board/gdsys/p1022/ddr.c | 4 +- board/keymile/kmp204x/ddr.c | 4 +- board/sbc8548/ddr.c | 6 +-- board/sbc8548/sbc8548.c | 2 +- board/sbc8641d/ddr.c | 4 +- board/sbc8641d/sbc8641d.c | 2 +- board/socrates/ddr.c | 4 +- board/socrates/sdram.c | 4 +- board/stx/stxgp3/ddr.c | 4 +- board/stx/stxgp3/stxgp3.c | 2 +- board/stx/stxssa/ddr.c | 4 +- board/stx/stxssa/stxssa.c | 2 +- board/xes/xpedite517x/ddr.c | 4 +- board/xes/xpedite517x/xpedite517x.c | 2 +- board/xes/xpedite520x/ddr.c | 4 +- board/xes/xpedite537x/ddr.c | 4 +- board/xes/xpedite550x/ddr.c | 4 +- drivers/ddr/fsl/Makefile | 49 ++++++++++++++++++++ .../mpc8xxx/ddr => drivers/ddr/fsl}/ctrl_regs.c | 8 ++-- .../ddr => drivers/ddr/fsl}/ddr1_dimm_params.c | 4 +- .../ddr => drivers/ddr/fsl}/ddr2_dimm_params.c | 4 +- .../ddr => drivers/ddr/fsl}/ddr3_dimm_params.c | 4 +- .../mpc8xxx/ddr => drivers/ddr/fsl}/interactive.c | 5 +- .../ddr/fsl}/lc_common_dimm_params.c | 4 +- .../cpu/mpc8xxx/ddr => drivers/ddr/fsl}/main.c | 4 +- .../ddr/fsl/mpc85xx_ddr_gen1.c | 6 +-- .../ddr/fsl/mpc85xx_ddr_gen2.c | 4 +- .../ddr/fsl/mpc85xx_ddr_gen3.c | 16 +++---- .../ddr-8641.c => drivers/ddr/fsl/mpc86xx_ddr.c | 6 +-- .../cpu/mpc8xxx/ddr => drivers/ddr/fsl}/options.c | 4 +- .../cpu/mpc8xxx/ddr => drivers/ddr/fsl}/util.c | 10 ++-- .../mpc8xxx/ddr => include}/common_timing_params.h | 0 .../cpu/mpc8xxx/ddr/ddr.h => include/fsl_ddr.h | 6 +-- .../include/asm => include}/fsl_ddr_dimm_params.h | 0 .../include/asm => include}/fsl_ddr_sdram.h | 0 nand_spl/board/freescale/mpc8569mds/nand_boot.c | 2 +- nand_spl/board/freescale/p1023rds/nand_boot.c | 4 +- nand_spl/board/freescale/p1_p2_rdb/nand_boot.c | 2 +- spl/Makefile | 2 +- 116 files changed, 304 insertions(+), 298 deletions(-) delete mode 100644 arch/powerpc/cpu/mpc8xxx/ddr/Makefile create mode 100644 drivers/ddr/fsl/Makefile rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/ctrl_regs.c (99%) rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/ddr1_dimm_params.c (99%) rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/ddr2_dimm_params.c (99%) rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/ddr3_dimm_params.c (99%) rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/interactive.c (99%) rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/lc_common_dimm_params.c (99%) rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/main.c (99%) rename arch/powerpc/cpu/mpc85xx/ddr-gen1.c => drivers/ddr/fsl/mpc85xx_ddr_gen1.c (93%) rename arch/powerpc/cpu/mpc85xx/ddr-gen2.c => drivers/ddr/fsl/mpc85xx_ddr_gen2.c (96%) rename arch/powerpc/cpu/mpc85xx/ddr-gen3.c => drivers/ddr/fsl/mpc85xx_ddr_gen3.c (97%) rename arch/powerpc/cpu/mpc86xx/ddr-8641.c => drivers/ddr/fsl/mpc86xx_ddr.c (95%) rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/options.c (99%) rename {arch/powerpc/cpu/mpc8xxx/ddr => drivers/ddr/fsl}/util.c (96%) rename {arch/powerpc/cpu/mpc8xxx/ddr => include}/common_timing_params.h (100%) rename arch/powerpc/cpu/mpc8xxx/ddr/ddr.h => include/fsl_ddr.h (97%) rename {arch/powerpc/include/asm => include}/fsl_ddr_dimm_params.h (100%) rename {arch/powerpc/include/asm => include}/fsl_ddr_sdram.h (100%)
diff --git a/Makefile b/Makefile index 2d18d27..4dd2e2e 100644 --- a/Makefile +++ b/Makefile @@ -291,19 +291,17 @@ LIBS-y += drivers/spi/libspi.o LIBS-y += drivers/dfu/libdfu.o ifeq ($(CPU),mpc83xx) LIBS-y += drivers/qe/libqe.o -LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o endif ifeq ($(CPU),mpc85xx) LIBS-y += drivers/qe/libqe.o LIBS-y += drivers/net/fm/libfm.o -LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o endif ifeq ($(CPU),mpc86xx) -LIBS-y += arch/powerpc/cpu/mpc8xxx/ddr/libddr.o LIBS-y += arch/powerpc/cpu/mpc8xxx/lib8xxx.o endif +LIBS-$(CONFIG_SYS_FSL_DDR) += drivers/ddr/fsl/libddr.o LIBS-y += drivers/rtc/librtc.o LIBS-y += drivers/serial/libserial.o LIBS-y += drivers/sound/libsound.o diff --git a/README b/README index 91c3ac0..fc5107f 100644 --- a/README +++ b/README @@ -423,16 +423,45 @@ The following options need to be configured: CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT This value denotes start offset of DSP CCSR space.
CONFIG_SYS_FSL_DDR_EMUSpecify emulator support for DDR. Some DDR features such asdeskew training are not available.Generic CPU options: CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
Defines the endianess of the CPU. Implementation of those values is arch specific.
CONFIG_SYS_FSL_DDRFreescale DDR driver in use. This type of DDR controller isfound in mpc83xx, mpc85xx, mpc86xx as well as some ARM coreSoCs.CONFIG_SYS_FSL_DDR_ADDRFreescale DDR memory-mapped register base.CONFIG_SYS_FSL_DDR_EMUSpecify emulator support for DDR. Some DDR features such asdeskew training are not available.CONFIG_SYS_FSL_DDR_PPC_GEN1Freescale DDR1 controller.CONFIG_SYS_FSL_DDR_PPC_GEN2Freescale DDR2 controller.CONFIG_SYS_FSL_DDR_PPC_GEN3Freescale DDR3 controller.
Why is there "PPC" in the name if this is to be common for PPC and ARM? The description is more generic than the config symbol...
CONFIG_FSL_DDR1User config to use DDR1. It can be enabled for SoCs withFreescale DDR1 or DDR2 controllers.CONFIG_FSL_DDR2User config to use DDR2. It can be eanbeld for SoCs withFreescale DDR2 or DDR3 controllers.CONFIG_FSL_DDR3User config to use DDR3. It can be enabled for SoCs withFreescale DDR3 controllers.
How is this user config, rather than a description of the type of DDR that is present?
diff --git a/arch/powerpc/include/asm/config_mpc86xx.h b/arch/powerpc/include/asm/config_mpc86xx.h index 694b110..4f9b225 100644 --- a/arch/powerpc/include/asm/config_mpc86xx.h +++ b/arch/powerpc/include/asm/config_mpc86xx.h @@ -7,6 +7,8 @@ #ifndef _ASM_MPC86xx_CONFIG_H_ #define _ASM_MPC86xx_CONFIG_H_
+#define CONFIG_SYS_FSL_DDR_86XX
This doesn't qualify as one of the "PPC_GEN" controllers?
-Scott